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{"@context":"https://schema.org","@type":"DiscussionForumPosting","headline":"How to test firmware and topology files","articleBody":"\r\nHello, \r\nI follow the [tutorial](https://thesofproject.github.io/latest/developer_guides/firmware/component-tutorial/tut-i-basic-fw-code.html) , I modify a little the file amp.c taking into count the switch.c and volume.c , The files compiles.\r\n\r\nThe code amp.c is:\r\n\r\n```\r\n#include \u003csof/audio/component.h\u003e\r\n#include \u003csof/lib/alloc.h\u003e\r\n\r\n\r\nDECLARE_SOF_RT_UUID(\"amp\", amp_uuid, 0x1d501197, 0xda27, 0x4697,\r\n                 0x80, 0xc8, 0x4e, 0x69, 0x4d, 0x36, 0x00, 0xa0);\r\n\r\nDECLARE_TR_CTX(amp_tr, SOF_UUID(amp_uuid), LOG_LEVEL_INFO);\r\n\r\nstruct amp_comp_data {\r\n        int placeholder;\r\n};\r\n\r\nstatic struct comp_dev *amp_new(const struct comp_driver *drv,\r\n                                struct comp_ipc_config *comp,\r\n                                void *spec);\r\nstatic void amp_free(struct comp_dev *dev);\r\n\r\nstatic int amp_trigger(struct comp_dev *dev, int cmd);\r\n\r\nstatic int amp_prepare(struct comp_dev *dev);\r\n\r\nstatic int amp_reset(struct comp_dev *dev);\r\n\r\nstatic int amp_copy(struct comp_dev *dev);\r\n\r\n\r\n\r\nstruct comp_driver comp_amp = {\r\n    .type = SOF_COMP_AMP,\r\n    .uid = SOF_RT_UUID(amp_uuid),\r\n    .tctx = \u0026amp_tr,\r\n    .ops = {\r\n            .create = amp_new,\r\n            .free = amp_free,\r\n            .params = NULL,\r\n            .cmd = NULL,\r\n            .trigger = amp_trigger,\r\n            .prepare = amp_prepare,\r\n            .reset = amp_reset,\r\n            .copy = amp_copy,\r\n    },\r\n};\r\n\r\nstatic SHARED_DATA struct comp_driver_info comp_amp_info = {\r\n    .drv = \u0026comp_amp,\r\n};\r\n\r\nstatic void sys_comp_amp_init(void)\r\n{\r\n    comp_register(platform_shared_get(\u0026comp_amp_info,sizeof(comp_amp_info)));\r\n}\r\n\r\n/**\r\n *\\brief Creat amp component\r\n *\r\n *\\return Pointer to amp base component device.\r\n**/\r\nstatic struct comp_dev *amp_new(const struct comp_driver *drv,\r\n                                struct comp_ipc_config *comp,\r\n                                void *spec)\r\n{\r\n    struct comp_dev *dev;\r\n    //struct ipc_config_amp *ampli = spec;\r\n    struct amp_comp_data *cd;\r\n\r\n    comp_cl_dbg(\u0026comp_amp, \"amp_new()\");\r\n    \r\n    //struct sof_ipc_comp_process *amp;\r\n    /*\r\n    struct sof_ipc_comp_process *ipc_amp\r\n            = (struct sof_ipc_comp_process *) comp;\r\n    */\r\n    \r\n    //Allocates memory for the component device and initializes common part\r\n    dev = comp_alloc(drv, sizeof(struct comp_dev));\r\n\r\n    if(!dev){\r\n        rfree(dev);\r\n        return NULL;\r\n    }\r\n    dev-\u003eipc_config = *comp;\r\n\r\n    cd = rzalloc(SOF_MEM_ZONE_RUNTIME, 0, SOF_MEM_CAPS_RAM, sizeof(*cd));\r\n\r\n    if(!cd){\r\n        rfree(dev);\r\n        return NULL;\r\n    }\r\n\r\n    //amp = COMP_GET_IPC(dev, sof_ipc_comp_process);\r\n    //int ret;\r\n    //ret = memcpy_s(amp,sizeof(*amp),ipc_amp,sizeof(struct sof_ipc_comp_process)));\r\n    //assert(!ret);\r\n\r\n    comp_set_drvdata(dev, cd);\r\n    dev-\u003estate = COMP_STATE_READY;\r\n\r\n    comp_dbg(dev, \"amplifier created\");\r\n    \r\n    return dev;\r\n}\r\n\r\n// Destructor\r\nstatic void amp_free(struct comp_dev *dev)\r\n{\r\n    struct comp_data *cd = comp_get_drvdata(dev);\r\n    rfree(cd);\r\n    rfree(dev);\r\n}\r\n\r\n//State Transition handler\r\nstatic int amp_trigger(struct comp_dev *dev, int cmd)\r\n{\r\n    comp_dbg(dev, \"amplifier got trigger cm %d, cmd\");\r\n    return comp_set_state(dev, cmd);    \r\n}\r\n\r\n// Stream Parameters Handler\r\nstatic int amp_prepare(struct comp_dev *dev)\r\n{\r\n    int ret;\r\n    struct comp_buffer *sink_buf;\r\n    //struct sof_ipc_comp_config *config = dev_comp_config(dev);\r\n\r\n    uint32_t sink_per_bytes;\r\n\r\n    ret = comp_set_state(dev, COMP_TRIGGER_PREPARE);\r\n    if(ret\u003c0)\r\n        return ret;\r\n    \r\n    if(ret==COMP_STATUS_STATE_ALREADY_SET)\r\n        return PPL_STATUS_PATH_STOP;\r\n\r\n    sink_buf = list_first_item(\u0026dev-\u003ebsink_list, struct comp_buffer, source_list);\r\n\r\n    sink_per_bytes = audio_stream_period_bytes(\u0026sink_buf-\u003estream, dev-\u003eframes);\r\n\r\n    if(sink_buf-\u003estream.size \u003c dev-\u003eipc_config.periods_sink * sink_per_bytes)\r\n    {\r\n        comp_err(dev, \"amp_prepare(): sink_buffer size is insuficient\");\r\n        return -ENOMEM;\r\n    }\r\n\r\n    comp_dbg(dev, \"amplifier prepared\");\r\n    return 0;\r\n}\r\n\r\n// Reset Handler\r\nstatic int amp_reset(struct comp_dev *dev)\r\n{\r\n    return comp_set_state(dev, COMP_TRIGGER_RESET);\r\n}\r\n\r\n// Signal processing function\r\n\r\nstatic int amp_copy(struct comp_dev *dev)\r\n{\r\n    struct comp_copy_limits cl;\r\n    struct comp_buffer *source;\r\n    struct comp_buffer *sink;\r\n    int frame;\r\n    int channel;\r\n    uint32_t buff_frag = 0;\r\n    uint16_t *src;\r\n    uint16_t *dst;\r\n\r\n    source = list_first_item(\u0026dev-\u003ebsource_list, struct comp_buffer, sink_list);\r\n    sink = list_first_item(\u0026dev-\u003ebsink_list,struct comp_buffer,source_list);\r\n\r\n    comp_get_copy_limits_with_lock(source, sink, \u0026cl);\r\n    //buffer_invalidate(source, cl.source_bytes);\r\n\r\n    for (frame = 0; frame \u003c cl.frames; frame++){\r\n        for (channel = 0; channel \u003c sink-\u003estream.channels; channel++){\r\n            src = audio_stream_read_frag_s16(\u0026source-\u003estream, buff_frag);\r\n            dst = audio_stream_write_frag_s16(\u0026sink-\u003estream, buff_frag);\r\n\r\n            *dst = *src;\r\n            ++buff_frag;\r\n        }\r\n    }\r\n    //buffer_writeback(sink, cl.sink_bytes);\r\n\r\n    comp_update_buffer_produce(sink, cl.sink_bytes);\r\n    //comp_update_buffer_comsume(source, cl.source_bytes);\r\n\r\n    return 0;\r\n\r\n}\r\n\r\nDECLARE_MODULE(sys_comp_amp_init);\r\n```\r\nI used the next topology file from [here](https://github.com/thesofproject/sof/pull/5302/files#r797741019) :\r\n```\r\n#\r\n# Topology for i.MX8MP board with wm8904 codec\r\n#\r\n\r\n# Include topology builder\r\ninclude(`utils.m4')\r\ninclude(`dai.m4')\r\ninclude(`pipeline.m4')\r\ninclude(`sai.m4')\r\ninclude(`pcm.m4')\r\ninclude(`buffer.m4')\r\n\r\n# Include TLV library\r\ninclude(`common/tlv.m4')\r\n\r\n# Include Token library\r\ninclude(`sof/tokens.m4')\r\n\r\n# Include DSP configuration\r\ninclude(`platform/imx/imx8.m4')\r\n\r\n#\r\n# Define the pipelines\r\n#\r\n# PCM0 \u003c----\u003e volume \u003c-----\u003e SAI3 (wm8904)\r\n#\r\n\r\ndnl PIPELINE_PCM_ADD(pipeline,\r\ndnl     pipe id, pcm, max channels, format,\r\ndnl     period, priority, core,\r\ndnl     pcm_min_rate, pcm_max_rate, pipeline_rate,\r\ndnl     time_domain, sched_comp)\r\n\r\n# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.\r\n# Set 1000us deadline with priority 0 on core 0\r\nPIPELINE_PCM_ADD(sof/pipe-`PPROC'-playback-4test.m4,\r\n\t1, 0, 2, s32le,\r\n\t1000, 0, 0,\r\n\t44100, 44100, 44100)\r\n\r\n# Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s32le.\r\n# Set 1000us deadline with priority 0 on core 0\r\nPIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,\r\n\t2, 0, 2, s32le,\r\n\t1000, 0, 0,\r\n\t44100, 44100, 44100)\r\n#\r\n# DAIs configuration\r\n#\r\n\r\ndnl DAI_ADD(pipeline,\r\ndnl     pipe id, dai type, dai_index, dai_be,\r\ndnl     buffer, periods, format,\r\ndnl     period, priority, core, time_domain)\r\n\r\n# playback DAI is SAI3 using 2 periods\r\n# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0\r\nDAI_ADD(sof/pipe-dai-playback.m4,\r\n\t1, SAI, 3, sai3-wm8904-hifi,\r\n\tPIPELINE_SOURCE_1, 2, s32le,\r\n\t1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)\r\n\r\n# capture DAI is SAI3 using 2 periods\r\n# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0\r\nDAI_ADD(sof/pipe-dai-capture.m4,\r\n\t2, SAI, 3, sai3-wm8904-hifi,\r\n\tPIPELINE_SINK_2, 2, s32le,\r\n\t1000, 0, 0)\r\n\r\n# PCM Low Latency, id 0\r\n\r\ndnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture)\r\nPCM_DUPLEX_ADD(Port0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)\r\n\r\ndnl DAI_CONFIG(type, idx, link_id, name, sai_config)\r\nDAI_CONFIG(SAI, 3, 0, sai3-wm8904-hifi,\r\n\tSAI_CONFIG(I2S, SAI_CLOCK(mclk, 11565177, codec_mclk_in),\r\n\t\tSAI_CLOCK(bclk, 1411200, codec_provider),\r\n\t\tSAI_CLOCK(fsync, 44100, codec_provider),\r\n        SAI_TDM(2, 32, 3, 3),\r\n\t\tSAI_CONFIG_DATA(SAI, 3, 0)))\r\n```\r\nand this pipe-volume-playback-4test.m :\r\n\r\n```\r\n# Low Latency Passthrough with volume Pipeline and PCM\r\n#\r\n# Pipeline Endpoints for connection are :-\r\n#\r\n#  host PCM_P --\u003e B0 --\u003e Volume 0 --\u003e B1 --\u003e sink DAI0\r\n\r\n# Include topology builder\r\ninclude(`utils.m4')\r\ninclude(`buffer.m4')\r\ninclude(`pcm.m4')\r\ninclude(`pga.m4')\r\ninclude(`dai.m4')\r\ninclude(`mixercontrol.m4')\r\ninclude(`bytecontrol.m4') # ADDED\r\ninclude(`pipeline.m4')\r\ninclude(`amp.m4') # ADDED\r\n\r\n\r\n#\r\n# Controls\r\n#\r\n# Volume Mixer control with max value of 32\r\nC_CONTROLMIXER(Master Playback Volume, PIPELINE_ID,\r\n\tCONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256),\r\n\tCONTROLMIXER_MAX(, 32),\r\n\tfalse,\r\n\tCONTROLMIXER_TLV(TLV 32 steps from -64dB to 0dB for 2dB, vtlv_m64s2),\r\n\tChannel register and shift for Front Left/Right,\r\n\tVOLUME_CHANNEL_MAP)\r\n\r\n#\r\n# Volume configuration\r\n#\r\n\r\ndefine(DEF_PGA_TOKENS, concat(`pga_tokens_', PIPELINE_ID))\r\ndefine(DEF_PGA_CONF, concat(`pga_conf_', PIPELINE_ID))\r\n\r\nW_VENDORTUPLES(DEF_PGA_TOKENS, sof_volume_tokens,\r\nLIST(`\t\t', `SOF_TKN_VOLUME_RAMP_STEP_TYPE\t\"2\"'\r\n     `\t\t', `SOF_TKN_VOLUME_RAMP_STEP_MS\t\t\"20\"'))\r\n\r\nW_DATA(DEF_PGA_CONF, DEF_PGA_TOKENS)\r\n\r\n\r\n############### ADDED ###############\r\n# Amp Parameters\r\ninclude(`amp_bytes.m4')\r\n\r\n# Amp Bytes control with max value of 140\r\n# The max size needs to also take into account the space required to hold the control data IPC message\r\n# struct sof_ipc_ctrl_data requires 92 bytes\r\n# AMP priv in amp_bytes.m4 (ABI header (32 bytes) + 2 dwords) requires 40 bytes\r\n# Therefore at least 132 bytes are required for this kcontrol\r\n# Any value lower than that would end up in a topology load error\r\n\r\nC_CONTROLBYTES(AMP, PIPELINE_ID,\r\n     CONTROLBYTES_OPS(bytes, 258 binds the control to bytes get/put handlers, 258, 258),\r\n     CONTROLBYTES_EXTOPS(258 binds the control to bytes get/put handlers, 258, 258),\r\n     , , ,\r\n     CONTROLBYTES_MAX(, 140),\r\n     ,\r\n     AMP_priv)\r\n\r\n#####################################\r\n\r\n#\r\n# Components and Buffers\r\n#\r\n\r\n# Host \"Passthrough Playback\" PCM\r\n# with 2 sink and 0 source periods\r\nW_PCM_PLAYBACK(PCM_ID, Passthrough Playback, 2, 0, SCHEDULE_CORE)\r\n\r\n# \"Volume\" has 2 source and x sink periods\r\nW_PGA(0, PIPELINE_FORMAT, DAI_PERIODS, 2, DEF_PGA_CONF, SCHEDULE_CORE,\r\n\tLIST(`\t\t', \"PIPELINE_ID Master Playback Volume\"))\r\n\r\n############### ADDED ###############\r\n# \"Amp\" has 2 sink periods and 2 source periods\r\nW_AMP(0, PIPELINE_FORMAT, 2, 2, SCHEDULE_CORE,\r\n     LIST(`           ', \"AMP\"))\r\n#####################################\r\n\r\n# Playback Buffers\r\nW_BUFFER(0, COMP_BUFFER_SIZE(2,\r\n\tCOMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)),\r\n\tPLATFORM_HOST_MEM_CAP, SCHEDULE_CORE)\r\nW_BUFFER(1, COMP_BUFFER_SIZE(DAI_PERIODS,\r\n\tCOMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)),\r\n\tPLATFORM_DAI_MEM_CAP, SCHEDULE_CORE)\r\n\r\n############### ADDED ###############\r\n# W_BUFFER(name, size, capabilities)\r\n\r\nW_BUFFER(2, COMP_BUFFER_SIZE(2,\r\n     COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)),\r\n     PLATFORM_HOST_MEM_CAP)\r\n\r\n#####################################\r\n\r\n#\r\n# Pipeline Graph\r\n#\r\n#  host PCM_P --\u003e B2 --\u003e Amp -\u003e B0 --\u003e Volume 0 --\u003e B1 --\u003e sink DAI0\r\n\r\nP_GRAPH(pipe-volume-playback-4test, PIPELINE_ID,\r\n\tLIST(`\t\t',\r\n\t`dapm(N_BUFFER(2), N_PCMP(PCM_ID))',\r\n     `dapm(N_AMP(0), N_BUFFER(2))',\r\n\t`dapm(N_BUFFER(0), N_AMP(0))',\r\n\t`dapm(N_PGA(0), N_BUFFER(0))',\r\n\t`dapm(N_BUFFER(1), N_PGA(0))'))\r\n\r\n#\r\n# Pipeline Source and Sinks\r\n#\r\nindir(`define', concat(`PIPELINE_SOURCE_', PIPELINE_ID), N_BUFFER(1))\r\nindir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID), Passthrough Playback PCM_ID)\r\n\r\nifdef(`CHANNELS_MIN',`define(`LOCAL_CHANNELS_MIN', `CHANNELS_MIN')',\r\n`define(`LOCAL_CHANNELS_MIN', `2')')\r\n\r\n#\r\n# PCM Configuration\r\n\r\n#\r\nPCM_CAPABILITIES(Passthrough Playback PCM_ID, CAPABILITY_FORMAT_NAME(PIPELINE_FORMAT), PCM_MIN_RATE, PCM_MAX_RATE, LOCAL_CHANNELS_MIN, PIPELINE_CHANNELS, 2, 16, 192, 16384, 65536, 65536)\r\n\r\nundefine(`LOCAL_CHANNELS_MIN')\r\nundefine(`DEF_PGA_TOKENS')\r\nundefine(`DEF_PGA_CONF')\r\n```\r\nCould you explain me if this function COMP_GET_IPC(dev, sof_ipc_comp_process) is still needed? , Sorry if my questions are too basic. \r\nHow could i test this firmware from the [tutorial](https://thesofproject.github.io/latest/developer_guides/firmware/component-tutorial/tut-i-basic-fw-code.html) ?\r\n\r\nThanks in advanced\r\n\r\n\r\n\r\n\r\n\r\n\r\n\r\n","author":{"url":"https://github.com/JCesarMolina","@type":"Person","name":"JCesarMolina"},"datePublished":"2022-04-01T15:47:33.000Z","interactionStatistic":{"@type":"InteractionCounter","interactionType":"https://schema.org/CommentAction","userInteractionCount":0},"url":"https://github.com/410/sof-docs/issues/410"}