René's URL Explorer Experiment


Title: Compare · SConsul/RISC-Microprocessor-Design · GitHub

Open Graph Title: Compare · SConsul/RISC-Microprocessor-Design

X Title: Compare · SConsul/RISC-Microprocessor-Design

Description: VHDL implementation of multicycle and pipelined RISC architecture - EE309 Autumn 2018, IIT Bombay - Compare · SConsul/RISC-Microprocessor-Design

Open Graph Description: VHDL implementation of multicycle and pipelined RISC architecture - EE309 Autumn 2018, IIT Bombay - Compare · SConsul/RISC-Microprocessor-Design

X Description: VHDL implementation of multicycle and pipelined RISC architecture - EE309 Autumn 2018, IIT Bombay - Compare · SConsul/RISC-Microprocessor-Design

Opengraph URL: https://github.com/SConsul/RISC-Microprocessor-Design

X: @github

direct link

Domain: patch-diff.githubusercontent.com

route-pattern/:user_id/:repository/compare(.:format)
route-controllercompare
route-actionnew
fetch-noncev2:8a342f53-bda0-09a0-8a69-63eee80423ff
current-catalog-service-hashae870bc5e265a340912cde392f23dad3671a0a881730ffdadd82f2f57d81641b
request-id858C:E0D53:6679A3:84DA6E:698E7CE0
html-safe-noncedb8b7244dd43e6468ee53d8b32291a385213d6a6b55704372ec687b6ad219b80
visitor-payloadeyJyZWZlcnJlciI6IiIsInJlcXVlc3RfaWQiOiI4NThDOkUwRDUzOjY2NzlBMzo4NERBNkU6Njk4RTdDRTAiLCJ2aXNpdG9yX2lkIjoiNjMwODA0NzQ0NzU1MDQ5MTg3MiIsInJlZ2lvbl9lZGdlIjoiaWFkIiwicmVnaW9uX3JlbmRlciI6ImlhZCJ9
visitor-hmacb6881237e192c01b378949ca01c64ef1131ace051f0e87dc17152e288c1f0dfd
hovercard-subject-tagrepository:154204546
github-keyboard-shortcutsrepository,source-code,copilot
google-site-verificationApib7-x98H0j5cPqHWwSMm6dNU4GmODRoqxLiDzdx9I
octolytics-urlhttps://collector.github.com/github/collect
analytics-location///compare/new
fb:app_id1401488693436528
apple-itunes-appapp-id=1477376905, app-argument=https://github.com/SConsul/RISC-Microprocessor-Design/compare
twitter:imagehttps://opengraph.githubassets.com/cc3f7fd60ea916209a313ceeaaf34a474f6754d80d09f18d4b389d9418c8b7fe/SConsul/RISC-Microprocessor-Design
twitter:cardsummary_large_image
og:imagehttps://opengraph.githubassets.com/cc3f7fd60ea916209a313ceeaaf34a474f6754d80d09f18d4b389d9418c8b7fe/SConsul/RISC-Microprocessor-Design
og:image:altVHDL implementation of multicycle and pipelined RISC architecture - EE309 Autumn 2018, IIT Bombay - Compare · SConsul/RISC-Microprocessor-Design
og:image:width1200
og:image:height600
og:site_nameGitHub
og:typeobject
hostnamegithub.com
expected-hostnamegithub.com
Nonecb2828a801ee6b7be618f3ac76fbf55def35bbc30f053a9c41bf90210b8b72ba
turbo-cache-controlno-preview
go-importgithub.com/SConsul/RISC-Microprocessor-Design git https://github.com/SConsul/RISC-Microprocessor-Design.git
octolytics-dimension-user_id32162912
octolytics-dimension-user_loginSConsul
octolytics-dimension-repository_id154204546
octolytics-dimension-repository_nwoSConsul/RISC-Microprocessor-Design
octolytics-dimension-repository_publictrue
octolytics-dimension-repository_is_forkfalse
octolytics-dimension-repository_network_root_id154204546
octolytics-dimension-repository_network_root_nwoSConsul/RISC-Microprocessor-Design
turbo-body-classeslogged-out env-production page-responsive
disable-turbofalse
browser-stats-urlhttps://api.github.com/_private/browser/stats
browser-errors-urlhttps://api.github.com/_private/browser/errors
releasef7a12861f7011eecb14bcc4388a767d829a52dfc
ui-targetfull
theme-color#1e2327
color-schemelight dark

Links:

Skip to contenthttps://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare#start-of-content
https://patch-diff.githubusercontent.com/
Sign in https://patch-diff.githubusercontent.com/login?return_to=https%3A%2F%2Fgithub.com%2FSConsul%2FRISC-Microprocessor-Design%2Fcompare
GitHub CopilotWrite better code with AIhttps://github.com/features/copilot
GitHub SparkBuild and deploy intelligent appshttps://github.com/features/spark
GitHub ModelsManage and compare promptshttps://github.com/features/models
MCP RegistryNewIntegrate external toolshttps://github.com/mcp
ActionsAutomate any workflowhttps://github.com/features/actions
CodespacesInstant dev environmentshttps://github.com/features/codespaces
IssuesPlan and track workhttps://github.com/features/issues
Code ReviewManage code changeshttps://github.com/features/code-review
GitHub Advanced SecurityFind and fix vulnerabilitieshttps://github.com/security/advanced-security
Code securitySecure your code as you buildhttps://github.com/security/advanced-security/code-security
Secret protectionStop leaks before they starthttps://github.com/security/advanced-security/secret-protection
Why GitHubhttps://github.com/why-github
Documentationhttps://docs.github.com
Bloghttps://github.blog
Changeloghttps://github.blog/changelog
Marketplacehttps://github.com/marketplace
View all featureshttps://github.com/features
Enterpriseshttps://github.com/enterprise
Small and medium teamshttps://github.com/team
Startupshttps://github.com/enterprise/startups
Nonprofitshttps://github.com/solutions/industry/nonprofits
App Modernizationhttps://github.com/solutions/use-case/app-modernization
DevSecOpshttps://github.com/solutions/use-case/devsecops
DevOpshttps://github.com/solutions/use-case/devops
CI/CDhttps://github.com/solutions/use-case/ci-cd
View all use caseshttps://github.com/solutions/use-case
Healthcarehttps://github.com/solutions/industry/healthcare
Financial serviceshttps://github.com/solutions/industry/financial-services
Manufacturinghttps://github.com/solutions/industry/manufacturing
Governmenthttps://github.com/solutions/industry/government
View all industrieshttps://github.com/solutions/industry
View all solutionshttps://github.com/solutions
AIhttps://github.com/resources/articles?topic=ai
Software Developmenthttps://github.com/resources/articles?topic=software-development
DevOpshttps://github.com/resources/articles?topic=devops
Securityhttps://github.com/resources/articles?topic=security
View all topicshttps://github.com/resources/articles
Customer storieshttps://github.com/customer-stories
Events & webinarshttps://github.com/resources/events
Ebooks & reportshttps://github.com/resources/whitepapers
Business insightshttps://github.com/solutions/executive-insights
GitHub Skillshttps://skills.github.com
Documentationhttps://docs.github.com
Customer supporthttps://support.github.com
Community forumhttps://github.com/orgs/community/discussions
Trust centerhttps://github.com/trust-center
Partnershttps://github.com/partners
GitHub SponsorsFund open source developershttps://github.com/sponsors
Security Labhttps://securitylab.github.com
Maintainer Communityhttps://maintainers.github.com
Acceleratorhttps://github.com/accelerator
Archive Programhttps://archiveprogram.github.com
Topicshttps://github.com/topics
Trendinghttps://github.com/trending
Collectionshttps://github.com/collections
Enterprise platformAI-powered developer platformhttps://github.com/enterprise
GitHub Advanced SecurityEnterprise-grade security featureshttps://github.com/security/advanced-security
Copilot for BusinessEnterprise-grade AI featureshttps://github.com/features/copilot/copilot-business
Premium SupportEnterprise-grade 24/7 supporthttps://github.com/premium-support
Pricinghttps://github.com/pricing
Search syntax tipshttps://docs.github.com/search-github/github-code-search/understanding-github-code-search-syntax
documentationhttps://docs.github.com/search-github/github-code-search/understanding-github-code-search-syntax
Sign in https://patch-diff.githubusercontent.com/login?return_to=https%3A%2F%2Fgithub.com%2FSConsul%2FRISC-Microprocessor-Design%2Fcompare
Sign up https://patch-diff.githubusercontent.com/signup?ref_cta=Sign+up&ref_loc=header+logged+out&ref_page=%2F%3Cuser-name%3E%2F%3Crepo-name%3E%2Fcompare%2Fnew&source=header-repo&source_repo=SConsul%2FRISC-Microprocessor-Design
Reloadhttps://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare
Reloadhttps://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare
Reloadhttps://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare
SConsul https://patch-diff.githubusercontent.com/SConsul
RISC-Microprocessor-Designhttps://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design
Notifications https://patch-diff.githubusercontent.com/login?return_to=%2FSConsul%2FRISC-Microprocessor-Design
Fork 1 https://patch-diff.githubusercontent.com/login?return_to=%2FSConsul%2FRISC-Microprocessor-Design
Star 1 https://patch-diff.githubusercontent.com/login?return_to=%2FSConsul%2FRISC-Microprocessor-Design
Code https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design
Issues 0 https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/issues
Pull requests 0 https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/pulls
Actions https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/actions
Projects 0 https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/projects
Security 0 https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/security
Insights https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/pulse
Code https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design
Issues https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/issues
Pull requests https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/pulls
Actions https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/actions
Projects https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/projects
Security https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/security
Insights https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/pulse
Please reload this pagehttps://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare
https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare/{{ urlEncodedRefName }}...master
https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare/{{ urlEncodedRefName }}...master
Please reload this pagehttps://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare
https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare/master...{{ urlEncodedRefName }}
https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare/master...{{ urlEncodedRefName }}
Learn about pull requestshttps://docs.github.com/articles/using-pull-requests
master@{1day}...master https://patch-diff.githubusercontent.com/SConsul/RISC-Microprocessor-Design/compare/master%40%7B1day%7D...master
https://github.com
Termshttps://docs.github.com/site-policy/github-terms/github-terms-of-service
Privacyhttps://docs.github.com/site-policy/privacy-policies/github-privacy-statement
Securityhttps://github.com/security
Statushttps://www.githubstatus.com/
Communityhttps://github.community/
Docshttps://docs.github.com/
Contacthttps://support.github.com?tags=dotcom-footer

Viewport: width=device-width

URLs of crawlers that visited me.