Title: For STM32F303VC USART Clock source selection has wrong setting · Issue #5 · RecursiveError/ClockHelper-zig · GitHub
Open Graph Title: For STM32F303VC USART Clock source selection has wrong setting · Issue #5 · RecursiveError/ClockHelper-zig
X Title: For STM32F303VC USART Clock source selection has wrong setting · Issue #5 · RecursiveError/ClockHelper-zig
Description: From the datasheet of RM0316 (STM32F303xB/C/D/E/6/8) The clock selection for USART1 has the following definition: Bits 1:0 USART1SW[1:0]: USART1 clock source selection This bit is set and cleared by software to select the USART1 clock so...
Open Graph Description: From the datasheet of RM0316 (STM32F303xB/C/D/E/6/8) The clock selection for USART1 has the following definition: Bits 1:0 USART1SW[1:0]: USART1 clock source selection This bit is set and cleared b...
X Description: From the datasheet of RM0316 (STM32F303xB/C/D/E/6/8) The clock selection for USART1 has the following definition: Bits 1:0 USART1SW[1:0]: USART1 clock source selection This bit is set and cleared b...
Opengraph URL: https://github.com/RecursiveError/ClockHelper-zig/issues/5
X: @github
Domain: patch-diff.githubusercontent.com
{"@context":"https://schema.org","@type":"DiscussionForumPosting","headline":"For STM32F303VC USART Clock source selection has wrong setting","articleBody":"From the datasheet of RM0316 (STM32F303xB/C/D/E/6/8)\n\nThe clock selection for USART1 has the following definition:\n\n```\nBits 1:0 USART1SW[1:0]: USART1 clock source selection\n This bit is set and cleared by software to select the USART1 clock source.\n 00: PCLK selected as USART1 clock source (default)\n 01: System clock (SYSCLK) selected as USART1 clock\n 10: LSE clock selected as USART1 clock\n 11: HSI clock selected as USART1 clock\n```\n\nWhile in the clock config enum is:\n\n```zig\npub const Usart1ClockSelectionList = enum {\n RCC_USART1CLKSOURCE_SYSCLK,\n RCC_USART1CLKSOURCE_HSI,\n RCC_USART1CLKSOURCE_LSE,\n RCC_USART1CLKSOURCE_PCLK1,\n RCC_USART1CLKSOURCE_PCLK2,\n pub fn get(self: @This()) usize {\n return switch (self) {\n .RCC_USART1CLKSOURCE_SYSCLK =\u003e 0,\n .RCC_USART1CLKSOURCE_HSI =\u003e 1,\n .RCC_USART1CLKSOURCE_LSE =\u003e 2,\n .RCC_USART1CLKSOURCE_PCLK1 =\u003e 3,\n .RCC_USART1CLKSOURCE_PCLK2 =\u003e 3,\n };\n }\n};\n```\n\nNone of the `@enumFromInt` nor `.get()` will provide the correct setting for the `RCC.CFGR` register.\nThe same situation happen for other USART clock selection list.\n\n","author":{"url":"https://github.com/mathk","@type":"Person","name":"mathk"},"datePublished":"2026-01-19T08:37:05.000Z","interactionStatistic":{"@type":"InteractionCounter","interactionType":"https://schema.org/CommentAction","userInteractionCount":3},"url":"https://github.com/5/ClockHelper-zig/issues/5"}
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| og:image:alt | From the datasheet of RM0316 (STM32F303xB/C/D/E/6/8) The clock selection for USART1 has the following definition: Bits 1:0 USART1SW[1:0]: USART1 clock source selection This bit is set and cleared b... |
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