Title: Slot limitations also depends with instructions with immediate values. · Issue #55 · unison-code/unison · GitHub
Open Graph Title: Slot limitations also depends with instructions with immediate values. · Issue #55 · unison-code/unison
X Title: Slot limitations also depends with instructions with immediate values. · Issue #55 · unison-code/unison
Description: Hello @robcasloz We would like your help in tackling a scenario where slot limitation also depends with instructions with immediates. Please have a look below, The VLIW target that we are trying to experiment can access immediates only t...
Open Graph Description: Hello @robcasloz We would like your help in tackling a scenario where slot limitation also depends with instructions with immediates. Please have a look below, The VLIW target that we are trying to...
X Description: Hello @robcasloz We would like your help in tackling a scenario where slot limitation also depends with instructions with immediates. Please have a look below, The VLIW target that we are trying to...
Opengraph URL: https://github.com/unison-code/unison/issues/55
X: @github
Domain: github.com
{"@context":"https://schema.org","@type":"DiscussionForumPosting","headline":"Slot limitations also depends with instructions with immediate values.","articleBody":"Hello @robcasloz \r\n\r\nWe would like your help in tackling a scenario where slot limitation also depends with instructions with immediates.\r\n\r\nPlease have a look below,\r\nThe VLIW target that we are trying to experiment can access immediates only through references where 1 packet can access three 8 bit immediate values.\r\n\r\nConsider the following scenarios,\r\n\r\nScenario 1\r\nBUNDLE {\r\n %r1 = ADDri %r1, 20,\r\n %r0 = ADDri %r0, 20,\r\n }\r\nPlease check the allocation slots below,\r\n\r\n\r\nScenario 2\r\nBUNDLE {\r\n %r1 = ADDri %r1, 20,\r\n %r0 = ADDri %r0, 20,\r\n\t %r2 = SUBri %r2, 20,\r\n }\r\nPlease check the allocation slots below,\r\n\r\n\r\nScenario 3\r\nBUNDLE {\r\n %r1 = ADDri %r1, 20,\r\n\t %r3 = ADD %r3, %r5,\r\n\t %r4 = SUB %r4, %r5,\r\n }\r\nPlease check the allocation slots below,\r\n\r\n\r\nScenario 4\r\nBUNDLE {\r\n %r1 = ADDri %r1, 20,\r\n %r0 = ADDri %r0, 40,\r\n\t %r2 = SUBri %r2, 60,\r\n }\r\nPlease check the allocation slots below,\r\n\r\n\t \r\nScenario 5\r\nBUNDLE {\r\n %r1 = ADDri %r1, 1200,\r\n %r4 = ADDri %r4, 14,\r\n }\r\nPlease check the allocation slots below,\r\n\r\n \r\nScenario 6\r\nBUNDLE {\r\n %r1 = ADDri %r1, 1200,\r\n %r0 = ADDri %r0, 4800,\r\n %r4 = ADDri %r4, 1,\r\n }\r\nPlease check the allocation slots below,\r\n\r\n \r\nWe are facing issue with Scenario 6, as \"1200\" decimal is converted to two 8 byte decimal value. And considering scenario 6, we are accessing five 8 bit immediate values.\r\n\r\nCan you please provide suggestion on how to make Unison aware of such restrictions so that such bundles are not generated.\r\nIn our case ADD instr has ALU_ALL slots, thus added in single bundle.\r\n\r\nRegards,\r\nUtkarsh","author":{"url":"https://github.com/utkarshyen","@type":"Person","name":"utkarshyen"},"datePublished":"2021-03-01T12:15:16.000Z","interactionStatistic":{"@type":"InteractionCounter","interactionType":"https://schema.org/CommentAction","userInteractionCount":6},"url":"https://github.com/55/unison/issues/55"}
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