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Title: GitHub - ACESLabUCSD/FASE_HostCPU: Host CPU of FASE: FPGA Acceleration of Secure Function Evaluation · GitHub

Open Graph Title: GitHub - ACESLabUCSD/FASE_HostCPU: Host CPU of FASE: FPGA Acceleration of Secure Function Evaluation

X Title: GitHub - ACESLabUCSD/FASE_HostCPU: Host CPU of FASE: FPGA Acceleration of Secure Function Evaluation

Description: Host CPU of FASE: FPGA Acceleration of Secure Function Evaluation - ACESLabUCSD/FASE_HostCPU

Open Graph Description: Host CPU of FASE: FPGA Acceleration of Secure Function Evaluation - ACESLabUCSD/FASE_HostCPU

X Description: Host CPU of FASE: FPGA Acceleration of Secure Function Evaluation - ACESLabUCSD/FASE_HostCPU

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https://github.com/siamumar/FASE_HostCPU#host-cpu-of-fase-powered-by-tinygarble
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Yao’s Garbled Circuit (GC)https://en.wikipedia.org/wiki/Garbled_circuit
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FASE: FPGA Acceleration of Secure Function Evaluationhttp://aceslab.org/sites/default/files/FASE.pdf
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