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Title: GitHub - sdevelop/scr1: SCR1 is a high-quality open-source RISC-V MCU core in Verilog · GitHub

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Description: SCR1 is a high-quality open-source RISC-V MCU core in Verilog - sdevelop/scr1

Open Graph Description: SCR1 is a high-quality open-source RISC-V MCU core in Verilog - sdevelop/scr1

X Description: SCR1 is a high-quality open-source RISC-V MCU core in Verilog - sdevelop/scr1

Mail addresses
scr1@syntacore.com

Opengraph URL: https://github.com/sdevelop/scr1

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