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Title: [Dev][AMD] Implement conditional async load for AMD HIP Backend by LeiWang1999 · Pull Request #250 · microsoft/BitBLAS · GitHub

Open Graph Title: [Dev][AMD] Implement conditional async load for AMD HIP Backend by LeiWang1999 · Pull Request #250 · microsoft/BitBLAS

X Title: [Dev][AMD] Implement conditional async load for AMD HIP Backend by LeiWang1999 · Pull Request #250 · microsoft/BitBLAS

Description: BitBLAS is a library to support mixed-precision matrix multiplications, especially for quantized LLM deployment. - [Dev][AMD] Implement conditional async load for AMD HIP Backend by LeiWang1999 · Pull Request #250 · microsoft/BitBLAS

Open Graph Description: Usage: #pragma unroll for (int i_3 = 0; i_3 < 2; ++i_3) { tl::cp_async_gs_conditional<16>(buf_dyn_shmem+((((i_3 * 4096) + ((((int)threadIdx.x) >> 2) * 64)) + (((((int)threadI...

X Description: Usage: #pragma unroll for (int i_3 = 0; i_3 &lt; 2; ++i_3) { tl::cp_async_gs_conditional&lt;16&gt;(buf_dyn_shmem+((((i_3 * 4096) + ((((int)threadIdx.x) &gt;&gt; 2) * 64)...

Opengraph URL: https://github.com/microsoft/BitBLAS/pull/250

X: @github

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Domain: github.com

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og:image:altUsage: #pragma unroll for (int i_3 = 0; i_3 < 2; ++i_3) { tl::cp_async_gs_conditional<16>(buf_dyn_shmem+((((i_3 * 4096) + ((((int)threadIdx.x) >> 2) * 64)) + (((((int)threadI...
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