René's URL Explorer Experiment

{"@context":"https://schema.org","@type":"DiscussionForumPosting","headline":"68000 CMPM address register updated before address error?","articleBody":"Consider this test case.  A4 is odd, so there's an address error.  Yet, the \"final\" value is incremented by 2, as if the post increment happened before or in parallel with the memory access.  Is this known to be the case on real hardware?\r\n\r\n```\r\n{ \"name\": \"b74c [CMP.w (A4)+, (A3)+] 6\",\r\n  \"initial\":\r\n    {\"d0\": 3616035900,\r\n     \"d1\": 4244842335,\r\n     \"d2\": 3804844838,\r\n     \"d3\": 2486760049,\r\n     \"d4\": 2154476239,\r\n     \"d5\": 2057425795,\r\n     \"d6\": 3717306163,\r\n     \"d7\": 806500645,\r\n     \"a0\": 2013264249,\r\n     \"a1\": 2727369354,\r\n     \"a2\": 3820627603,\r\n     \"a3\": 3490029285,\r\n     \"a4\": 900360119,\r\n     \"a5\": 1926964183,\r\n     \"a6\": 2103704679,\r\n     \"usp\": 882354928,\r\n     \"ssp\": 2048,\r\n     \"sr\": 9985,\r\n     \"pc\": 3072,\r\n     \"prefetch\": [46924, 41774],\r\n     \"ram\": [[5123, 95], [5122, 244], [5121, 175], [5120, 52], [15, 0], [14, 20], [13, 0], [12, 0]]},\r\n  \"final\":\r\n    {\"d0\": 3616035900,\r\n     \"d1\": 4244842335,\r\n     \"d2\": 3804844838,\r\n     \"d3\": 2486760049,\r\n     \"d4\": 2154476239,\r\n     \"d5\": 2057425795,\r\n     \"d6\": 3717306163,\r\n     \"d7\": 806500645,\r\n     \"a0\": 2013264249,\r\n     \"a1\": 2727369354,\r\n     \"a2\": 3820627603,\r\n     \"a3\": 3490029285,\r\n     \"a4\": 900360121,\r\n     \"a5\": 1926964183,\r\n     \"a6\": 2103704679,\r\n     \"usp\": 882354928,\r\n     \"ssp\": 2034,\r\n     \"sr\": 9985,\r\n     \"pc\": 5120,\r\n     \"prefetch\": [13487, 62559],\r\n     \"ram\": [[13, 0], [2037, 170], [12, 0], [2036, 53], [2035, 85], [5121, 175], [15, 0], [2039, 183], [5120, 52], [14, 20], [2038, 103], [5123, 95], [2041, 76], [5122, 244], [2040, 183], [2034, 183], [2045, 0], [2044, 0], [2043, 1], [2042, 39], [2047, 0], [2046, 12]]},\r\n  \"length\": 50,\r\n  \"transactions\":\r\n    [[\"n\", 4],\r\n     [\"w\", 4, 5, 2046, \".w\", 3072],\r\n     [\"w\", 4, 5, 2042, \".w\", 9985],\r\n     [\"w\", 4, 5, 2044, \".w\", 0],\r\n     [\"w\", 4, 5, 2040, \".w\", 46924],\r\n     [\"w\", 4, 5, 2038, \".w\", 26551],\r\n     [\"w\", 4, 5, 2034, \".w\", 46933],\r\n     [\"w\", 4, 5, 2036, \".w\", 13738],\r\n     [\"r\", 4, 5, 12, \".w\", 0],\r\n     [\"r\", 4, 5, 14, \".w\", 5120],\r\n     [\"r\", 4, 6, 5120, \".w\", 13487],\r\n     [\"n\", 2],\r\n     [\"r\", 4, 6, 5122, \".w\", 62559]]},\r\n```\r\n\r\n","author":{"url":"https://github.com/larsbrinkhoff","@type":"Person","name":"larsbrinkhoff"},"datePublished":"2023-04-11T18:24:32.000Z","interactionStatistic":{"@type":"InteractionCounter","interactionType":"https://schema.org/CommentAction","userInteractionCount":4},"url":"https://github.com/27/ProcessorTests/issues/27"}