René's URL Explorer Experiment


Title: CPU cache - Wikipedia

Open Graph Title: CPU cache - Wikipedia

Generator: MediaWiki 1.46.0-wmf.15

direct link

Domain: en.wikipedia.org

Hey, it has json ld scripts: 
{"@context":"https:\/\/schema.org","@type":"Article","name":"CPU cache","url":"https:\/\/en.wikipedia.org\/wiki\/CPU_cache","sameAs":"http:\/\/www.wikidata.org\/entity\/Q352090","mainEntity":"http:\/\/www.wikidata.org\/entity\/Q352090","author":{"@type":"Organization","name":"Contributors to Wikimedia projects"},"publisher":{"@type":"Organization","name":"Wikimedia Foundation, Inc.","logo":{"@type":"ImageObject","url":"https:\/\/www.wikimedia.org\/static\/images\/wmf-hor-googpub.png"}},"datePublished":"2004-07-22T08:23:09Z","dateModified":"2026-02-07T21:00:28Z","headline":"dynamically managed local memory that mirrors main memory in a microprocessor to reduce the cost of access"}
referrerorigin-when-cross-origin
format-detectiontelephone=no
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Links:

Jump to contenthttps://en.wikipedia.org/wiki/CPU_cache#bodyContent
Main pagehttps://en.wikipedia.org/wiki/Main_Page
Contentshttps://en.wikipedia.org/wiki/Wikipedia:Contents
Current eventshttps://en.wikipedia.org/wiki/Portal:Current_events
Random articlehttps://en.wikipedia.org/wiki/Special:Random
About Wikipediahttps://en.wikipedia.org/wiki/Wikipedia:About
Contact ushttps://en.wikipedia.org/wiki/Wikipedia:Contact_us
Helphttps://en.wikipedia.org/wiki/Help:Contents
Learn to edithttps://en.wikipedia.org/wiki/Help:Introduction
Community portalhttps://en.wikipedia.org/wiki/Wikipedia:Community_portal
Recent changeshttps://en.wikipedia.org/wiki/Special:RecentChanges
Upload filehttps://en.wikipedia.org/wiki/Wikipedia:File_upload_wizard
Special pageshttps://en.wikipedia.org/wiki/Special:SpecialPages
https://en.wikipedia.org/wiki/Main_Page
Search https://en.wikipedia.org/wiki/Special:Search
Donatehttps://donate.wikimedia.org/?wmf_source=donate&wmf_medium=sidebar&wmf_campaign=en.wikipedia.org&uselang=en
Create accounthttps://en.wikipedia.org/w/index.php?title=Special:CreateAccount&returnto=CPU+cache
Log inhttps://en.wikipedia.org/w/index.php?title=Special:UserLogin&returnto=CPU+cache
Donatehttps://donate.wikimedia.org/?wmf_source=donate&wmf_medium=sidebar&wmf_campaign=en.wikipedia.org&uselang=en
Create accounthttps://en.wikipedia.org/w/index.php?title=Special:CreateAccount&returnto=CPU+cache
Log inhttps://en.wikipedia.org/w/index.php?title=Special:UserLogin&returnto=CPU+cache
(Top) https://en.wikipedia.org/wiki/CPU_cache
1 Overview https://en.wikipedia.org/wiki/CPU_cache#Overview
2 History https://en.wikipedia.org/wiki/CPU_cache#History
3 Operation https://en.wikipedia.org/wiki/CPU_cache#Operation
3.1 Cache entries https://en.wikipedia.org/wiki/CPU_cache#Cache_entries
3.2 Policies https://en.wikipedia.org/wiki/CPU_cache#Policies
3.2.1 Replacement policies https://en.wikipedia.org/wiki/CPU_cache#Replacement_policies
3.2.2 Write policies https://en.wikipedia.org/wiki/CPU_cache#Write_policies
3.3 Cache performance https://en.wikipedia.org/wiki/CPU_cache#Cache_performance
3.3.1 CPU stalls https://en.wikipedia.org/wiki/CPU_cache#CPU_stalls
4 Associativity https://en.wikipedia.org/wiki/CPU_cache#Associativity
4.1 Direct-mapped cache https://en.wikipedia.org/wiki/CPU_cache#Direct-mapped_cache
4.2 Two-way set associative cache https://en.wikipedia.org/wiki/CPU_cache#Two-way_set_associative_cache
4.3 Speculative execution https://en.wikipedia.org/wiki/CPU_cache#Speculative_execution
4.4 Two-way skewed associative cache https://en.wikipedia.org/wiki/CPU_cache#Two-way_skewed_associative_cache
4.5 Pseudo-associative cache https://en.wikipedia.org/wiki/CPU_cache#Pseudo-associative_cache
4.6 Multicolumn cache https://en.wikipedia.org/wiki/CPU_cache#Multicolumn_cache
5 Cache entry structure https://en.wikipedia.org/wiki/CPU_cache#Cache_entry_structure
5.1 Example https://en.wikipedia.org/wiki/CPU_cache#Example
5.2 Flag bits https://en.wikipedia.org/wiki/CPU_cache#Flag_bits
6 Cache miss https://en.wikipedia.org/wiki/CPU_cache#Cache_miss
7 Address translation https://en.wikipedia.org/wiki/CPU_cache#Address_translation
7.1 Homonym and synonym problems https://en.wikipedia.org/wiki/CPU_cache#Homonym_and_synonym_problems
7.2 Virtual tags and hints https://en.wikipedia.org/wiki/CPU_cache#Virtual_tags_and_hints
7.3 Page coloring https://en.wikipedia.org/wiki/CPU_cache#Page_coloring
8 Cache hierarchy in a modern processor https://en.wikipedia.org/wiki/CPU_cache#Cache_hierarchy_in_a_modern_processor
8.1 Specialized caches https://en.wikipedia.org/wiki/CPU_cache#Specialized_caches
8.1.1 Victim cache https://en.wikipedia.org/wiki/CPU_cache#Victim_cache
8.1.2 Trace cache https://en.wikipedia.org/wiki/CPU_cache#Trace_cache
8.1.3 Write Coalescing Cache (WCC) https://en.wikipedia.org/wiki/CPU_cache#Write_Coalescing_Cache_(WCC)
8.1.4 Micro-operation (μop or uop) cache https://en.wikipedia.org/wiki/CPU_cache#Micro-operation_(μop_or_uop)_cache
8.1.5 Branch target instruction cache https://en.wikipedia.org/wiki/CPU_cache#Branch_target_instruction_cache
8.1.6 Smart cache https://en.wikipedia.org/wiki/CPU_cache#Smart_cache
8.2 Multi-level caches https://en.wikipedia.org/wiki/CPU_cache#Multi-level_caches
8.2.1 Multi-core chips https://en.wikipedia.org/wiki/CPU_cache#Multi-core_chips
8.2.2 Separate versus unified https://en.wikipedia.org/wiki/CPU_cache#Separate_versus_unified
8.2.3 Exclusive versus inclusive https://en.wikipedia.org/wiki/CPU_cache#Exclusive_versus_inclusive
8.3 Scratchpad memory https://en.wikipedia.org/wiki/CPU_cache#Scratchpad_memory
8.4 Example: the K8 https://en.wikipedia.org/wiki/CPU_cache#Example:_the_K8
8.5 More hierarchies https://en.wikipedia.org/wiki/CPU_cache#More_hierarchies
8.6 Tag RAM https://en.wikipedia.org/wiki/CPU_cache#Tag_RAM
9 Implementation https://en.wikipedia.org/wiki/CPU_cache#Implementation
9.1 History https://en.wikipedia.org/wiki/CPU_cache#History_2
9.1.1 First TLB implementations https://en.wikipedia.org/wiki/CPU_cache#First_TLB_implementations
9.1.2 First instruction cache https://en.wikipedia.org/wiki/CPU_cache#First_instruction_cache
9.1.3 First data cache https://en.wikipedia.org/wiki/CPU_cache#First_data_cache
9.1.4 In 68k microprocessors https://en.wikipedia.org/wiki/CPU_cache#In_68k_microprocessors
9.1.5 In x86 microprocessors https://en.wikipedia.org/wiki/CPU_cache#In_x86_microprocessors
9.1.6 In ARM microprocessors https://en.wikipedia.org/wiki/CPU_cache#In_ARM_microprocessors
9.1.7 Current research https://en.wikipedia.org/wiki/CPU_cache#Current_research
9.2 Multi-ported cache https://en.wikipedia.org/wiki/CPU_cache#Multi-ported_cache
10 See also https://en.wikipedia.org/wiki/CPU_cache#See_also
11 Notes https://en.wikipedia.org/wiki/CPU_cache#Notes
12 References https://en.wikipedia.org/wiki/CPU_cache#References
13 External links https://en.wikipedia.org/wiki/CPU_cache#External_links
العربيةhttps://ar.wikipedia.org/wiki/%D8%B0%D8%A7%D9%83%D8%B1%D8%A9_%D9%88%D8%AD%D8%AF%D8%A9_%D8%A7%D9%84%D9%85%D8%B9%D8%A7%D9%84%D8%AC%D8%A9_%D8%A7%D9%84%D9%85%D8%B1%D9%83%D8%B2%D9%8A%D8%A9
भोजपुरीhttps://bh.wikipedia.org/wiki/%E0%A4%95%E0%A5%88%E0%A4%B6_%E0%A4%AE%E0%A5%87%E0%A4%AE%E0%A5%8B%E0%A4%B0%E0%A5%80
Българскиhttps://bg.wikipedia.org/wiki/%D0%9F%D1%80%D0%BE%D1%86%D0%B5%D1%81%D0%BE%D1%80%D0%B5%D0%BD_%D0%BA%D0%B5%D1%88
Catalàhttps://ca.wikipedia.org/wiki/Mem%C3%B2ria_cau_de_la_CPU
Češtinahttps://cs.wikipedia.org/wiki/CPU_cache
Deutschhttps://de.wikipedia.org/wiki/Befehlscache
Eestihttps://et.wikipedia.org/wiki/Protsessori_vahem%C3%A4lu
Españolhttps://es.wikipedia.org/wiki/Cach%C3%A9_de_CPU
فارسیhttps://fa.wikipedia.org/wiki/%D8%AD%D8%A7%D9%81%D8%B8%D9%87_%D9%86%D9%87%D8%A7%D9%86_%D8%B3%DB%8C%E2%80%8C%D9%BE%DB%8C%E2%80%8C%DB%8C%D9%88
Françaishttps://fr.wikipedia.org/wiki/Cache_de_processeur
Gaeilgehttps://ga.wikipedia.org/wiki/Taisc-chuimhne
한국어https://ko.wikipedia.org/wiki/CPU_%EC%BA%90%EC%8B%9C
Bahasa Indonesiahttps://id.wikipedia.org/wiki/Tembolok_CPU
Italianohttps://it.wikipedia.org/wiki/CPU_cache
Latviešuhttps://lv.wikipedia.org/wiki/Procesora_ke%C5%A1atmi%C5%86a
Lietuviųhttps://lt.wikipedia.org/wiki/Procesoriaus_spartinan%C4%8Dioji_atmintin%C4%97
Македонскиhttps://mk.wikipedia.org/wiki/%D0%9E%D0%B1%D1%80%D0%B0%D0%B1%D0%BE%D1%82%D1%83%D0%B2%D0%B0%D1%87%D0%BA%D0%B8_%D0%BC%D0%B5%D1%93%D1%83%D1%81%D0%BA%D0%BB%D0%B0%D0%B4
മലയാളംhttps://ml.wikipedia.org/wiki/%E0%B4%B8%E0%B4%BF.%E0%B4%AA%E0%B4%BF.%E0%B4%AF%E0%B5%81._%E0%B4%95%E0%B4%BE%E0%B4%B7%E0%B5%8D
Nederlandshttps://nl.wikipedia.org/wiki/CPU-cache
日本語https://ja.wikipedia.org/wiki/%E3%82%AD%E3%83%A3%E3%83%83%E3%82%B7%E3%83%A5%E3%83%A1%E3%83%A2%E3%83%AA
Norsk bokmålhttps://no.wikipedia.org/wiki/Hurtigminne
Polskihttps://pl.wikipedia.org/wiki/Pami%C4%99%C4%87_podr%C4%99czna_procesora
Portuguêshttps://pt.wikipedia.org/wiki/Cache_do_processador
Русскийhttps://ru.wikipedia.org/wiki/%D0%9A%D1%8D%D1%88_%D0%BF%D1%80%D0%BE%D1%86%D0%B5%D1%81%D1%81%D0%BE%D1%80%D0%B0
Slovenčinahttps://sk.wikipedia.org/wiki/R%C3%BDchla_vyrovn%C3%A1vacia_pam%C3%A4%C5%A5_procesora
Српски / srpskihttps://sr.wikipedia.org/wiki/%D0%9A%D0%B5%D1%88_%D1%86%D0%B5%D0%BD%D1%82%D1%80%D0%B0%D0%BB%D0%BD%D0%B5_%D0%BF%D1%80%D0%BE%D1%86%D0%B5%D1%81%D0%BE%D1%80%D1%81%D0%BA%D0%B5_%D1%98%D0%B5%D0%B4%D0%B8%D0%BD%D0%B8%D1%86%D0%B5
தமிழ்https://ta.wikipedia.org/wiki/%E0%AE%AA%E0%AE%A4%E0%AF%81%E0%AE%95%E0%AF%8D%E0%AE%95%E0%AF%81_%E0%AE%A8%E0%AE%BF%E0%AE%A9%E0%AF%88%E0%AE%B5%E0%AE%95%E0%AE%AE%E0%AF%8D
Türkçehttps://tr.wikipedia.org/wiki/%C4%B0%C5%9Flemci_%C3%B6nbelle%C4%9Fi
Українськаhttps://uk.wikipedia.org/wiki/%D0%9A%D0%B5%D1%88_%D0%BF%D1%80%D0%BE%D1%86%D0%B5%D1%81%D0%BE%D1%80%D0%B0
Tiếng Việthttps://vi.wikipedia.org/wiki/CPU_cache
中文https://zh.wikipedia.org/wiki/CPU%E7%BC%93%E5%AD%98
Edit linkshttps://www.wikidata.org/wiki/Special:EntityPage/Q352090#sitelinks-wikipedia
Articlehttps://en.wikipedia.org/wiki/CPU_cache
Talkhttps://en.wikipedia.org/wiki/Talk:CPU_cache
Readhttps://en.wikipedia.org/wiki/CPU_cache
Edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit
View historyhttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=history
Readhttps://en.wikipedia.org/wiki/CPU_cache
Edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit
View historyhttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=history
What links herehttps://en.wikipedia.org/wiki/Special:WhatLinksHere/CPU_cache
Related changeshttps://en.wikipedia.org/wiki/Special:RecentChangesLinked/CPU_cache
Upload filehttps://en.wikipedia.org/wiki/Wikipedia:File_Upload_Wizard
Permanent linkhttps://en.wikipedia.org/w/index.php?title=CPU_cache&oldid=1337160639
Page informationhttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=info
Cite this pagehttps://en.wikipedia.org/w/index.php?title=Special:CiteThisPage&page=CPU_cache&id=1337160639&wpFormIdentifier=titleform
Get shortened URLhttps://en.wikipedia.org/w/index.php?title=Special:UrlShortener&url=https%3A%2F%2Fen.wikipedia.org%2Fwiki%2FCPU_cache
Download QR codehttps://en.wikipedia.org/w/index.php?title=Special:QrCode&url=https%3A%2F%2Fen.wikipedia.org%2Fwiki%2FCPU_cache
Download as PDFhttps://en.wikipedia.org/w/index.php?title=Special:DownloadAsPdf&page=CPU_cache&action=show-download-screen
Printable versionhttps://en.wikipedia.org/w/index.php?title=CPU_cache&printable=yes
Wikimedia Commonshttps://commons.wikimedia.org/wiki/Category:CPU_cache
Wikidata itemhttps://www.wikidata.org/wiki/Special:EntityPage/Q352090
hardware cachehttps://en.wikipedia.org/wiki/Hardware_cache
central processing unithttps://en.wikipedia.org/wiki/Central_processing_unit
computerhttps://en.wikipedia.org/wiki/Computer
datahttps://en.wikipedia.org/wiki/Data_(computer_science)
main memoryhttps://en.wikipedia.org/wiki/Main_memory
[1]https://en.wikipedia.org/wiki/CPU_cache#cite_note-1
processor corehttps://en.wikipedia.org/wiki/Processor_core
memory locationshttps://en.wikipedia.org/wiki/Memory_location
static random-access memoryhttps://en.wikipedia.org/wiki/Static_random-access_memory
transistorshttps://en.wikipedia.org/wiki/Transistor
bithttps://en.wikipedia.org/wiki/Bit
eDRAMhttps://en.wikipedia.org/wiki/EDRAM
levelshttps://en.wikipedia.org/wiki/CPU_cache#MULTILEVEL
[2]https://en.wikipedia.org/wiki/CPU_cache#cite_note-2
translation lookaside bufferhttps://en.wikipedia.org/wiki/Translation_lookaside_buffer
memory management unithttps://en.wikipedia.org/wiki/Memory_management_unit
Input/outputhttps://en.wikipedia.org/wiki/Input/output
data buffershttps://en.wikipedia.org/wiki/Data_buffer
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=1
main memoryhttps://en.wikipedia.org/wiki/Main_memory
address bushttps://en.wikipedia.org/wiki/Address_bus
DRAMhttps://en.wikipedia.org/wiki/DRAM
data bushttps://en.wikipedia.org/wiki/Data_bus
desktophttps://en.wikipedia.org/wiki/Desktop_computer
serverhttps://en.wikipedia.org/wiki/Server_(computing)
Translation lookaside bufferhttps://en.wikipedia.org/wiki/Translation_lookaside_buffer
memory management unithttps://en.wikipedia.org/wiki/Memory_management_unit
MicroOp-cachehttps://en.wikipedia.org/wiki/Micro-operation
Branch target bufferhttps://en.wikipedia.org/wiki/Branch_target_buffer
multi-level cacheshttps://en.wikipedia.org/wiki/CPU_cache#Multi-level_caches
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=2
https://en.wikipedia.org/wiki/File:NeXTcube_motherboard.jpg
Motherboardhttps://en.wikipedia.org/wiki/Motherboard
NeXTcubehttps://en.wikipedia.org/wiki/NeXTcube
Motorola 68040https://en.wikipedia.org/wiki/Motorola_68040
MHzhttps://en.wikipedia.org/wiki/MHz
Atlas 2https://en.wikipedia.org/wiki/Titan_(1963_computer)
[3]https://en.wikipedia.org/wiki/CPU_cache#cite_note-3
IBM System/360 Model 85https://en.wikipedia.org/wiki/IBM_System/360_Model_85
[4]https://en.wikipedia.org/wiki/CPU_cache#cite_note-4
[5]https://en.wikipedia.org/wiki/CPU_cache#cite_note-5
IBM 801https://en.wikipedia.org/wiki/IBM_801
[6]https://en.wikipedia.org/wiki/CPU_cache#cite_note-6
[7]https://en.wikipedia.org/wiki/CPU_cache#cite_note-7
dollarhttps://en.wikipedia.org/wiki/United_States_dollar
SoCshttps://en.wikipedia.org/wiki/System_on_a_chip
multi-core processorhttps://en.wikipedia.org/wiki/Multi-core_processor
dynamic random-access memoryhttps://en.wikipedia.org/wiki/Dynamic_random-access_memory
static random-access memoryhttps://en.wikipedia.org/wiki/Static_random-access_memory
eDRAMhttps://en.wikipedia.org/wiki/EDRAM
[8]https://en.wikipedia.org/wiki/CPU_cache#cite_note-:0-8
KiBhttps://en.wikipedia.org/wiki/Kibibyte
MiBhttps://en.wikipedia.org/wiki/Mebibyte
Intel Core 2 Duohttps://en.wikipedia.org/wiki/Intel_Core_2_Duo
IBM zEC12https://en.wikipedia.org/wiki/IBM_zEC12_(microprocessor)
IBM z13https://en.wikipedia.org/wiki/IBM_z13_(microprocessor)
[9]https://en.wikipedia.org/wiki/CPU_cache#cite_note-9
Ice Lakehttps://en.wikipedia.org/wiki/Ice_Lake_(microprocessor)
Intel Atomhttps://en.wikipedia.org/wiki/Intel_Atom
[10]https://en.wikipedia.org/wiki/CPU_cache#cite_note-10
[11]https://en.wikipedia.org/wiki/CPU_cache#cite_note-11
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=3
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=4
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=5
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=6
Cache replacement policieshttps://en.wikipedia.org/wiki/Cache_replacement_policies
least-recently usedhttps://en.wikipedia.org/wiki/Least-recently_used
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=7
Cache (computing) § Writing policieshttps://en.wikipedia.org/wiki/Cache_(computing)#WRITEPOLICIES
write-throughhttps://en.wikipedia.org/wiki/Write-through
write-backhttps://en.wikipedia.org/wiki/Write-back
dirtyhttps://en.wikipedia.org/wiki/Dirty_bit
direct memory accesshttps://en.wikipedia.org/wiki/Direct_memory_access
multi-core processorhttps://en.wikipedia.org/wiki/Multi-core_processor
multiprocessorhttps://en.wikipedia.org/wiki/Multiprocessor
cache coherencehttps://en.wikipedia.org/wiki/Cache_coherence
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=8
Cache performance measurementhttps://en.wikipedia.org/wiki/Cache_performance_measurement_and_metric
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=9
latencyhttps://en.wikipedia.org/wiki/Latency_(engineering)
out-of-order executionhttps://en.wikipedia.org/wiki/Out-of-order_execution
simultaneous multithreadinghttps://en.wikipedia.org/wiki/Simultaneous_multithreading
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=10
https://en.wikipedia.org/wiki/File:Cache_Fill.svg
Cache placement policieshttps://en.wikipedia.org/wiki/Cache_placement_policies
placement policyhttps://en.wikipedia.org/wiki/Cache_placement_policies
[12]https://en.wikipedia.org/wiki/CPU_cache#cite_note-12
AMD Athlonhttps://en.wikipedia.org/wiki/AMD_Athlon
trade-offhttps://en.wikipedia.org/wiki/Trade-off
conflict misseshttps://en.wikipedia.org/wiki/Cache_performance_measurement_and_metric#Conflict_misses
[13]https://en.wikipedia.org/wiki/CPU_cache#cite_note-13
virtual aliasinghttps://en.wikipedia.org/wiki/CPU_cache#Virtual_aliasing
[14]https://en.wikipedia.org/wiki/CPU_cache#cite_note-14
[15]https://en.wikipedia.org/wiki/CPU_cache#cite_note-Seznec-15
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=11
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=12
LRUhttps://en.wikipedia.org/wiki/Cache_algorithms
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=13
speculationhttps://en.wikipedia.org/wiki/Speculative_execution
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=14
[15]https://en.wikipedia.org/wiki/CPU_cache#cite_note-Seznec-15
hash functionhttps://en.wikipedia.org/wiki/Hash_function
[16]https://en.wikipedia.org/wiki/CPU_cache#cite_note-CK-16
LRUhttps://en.wikipedia.org/wiki/Cache_algorithms
[17]https://en.wikipedia.org/wiki/CPU_cache#cite_note-17
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=15
content-addressable memoryhttps://en.wikipedia.org/wiki/Content-addressable_memory
[16]https://en.wikipedia.org/wiki/CPU_cache#cite_note-CK-16
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=16
[18]https://en.wikipedia.org/wiki/CPU_cache#cite_note-Two-fast-18
[18]https://en.wikipedia.org/wiki/CPU_cache#cite_note-Two-fast-18
citation neededhttps://en.wikipedia.org/wiki/Wikipedia:Citation_needed
[19]https://en.wikipedia.org/wiki/CPU_cache#cite_note-19
[20]https://en.wikipedia.org/wiki/CPU_cache#cite_note-20
[21]https://en.wikipedia.org/wiki/CPU_cache#cite_note-21
[22]https://en.wikipedia.org/wiki/CPU_cache#cite_note-22
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=17
discussed belowhttps://en.wikipedia.org/wiki/CPU_cache#Flag_bits
error correction codehttps://en.wikipedia.org/wiki/ECC_memory#Cache
[23]https://en.wikipedia.org/wiki/CPU_cache#cite_note-23
MSBhttps://en.wikipedia.org/wiki/Most_significant_bit
LSBhttps://en.wikipedia.org/wiki/Least_significant_bit
[8]https://en.wikipedia.org/wiki/CPU_cache#cite_note-:0-8
[24]https://en.wikipedia.org/wiki/CPU_cache#cite_note-24
[25]https://en.wikipedia.org/wiki/CPU_cache#cite_note-ccs.neu.edu-25
[26]https://en.wikipedia.org/wiki/CPU_cache#cite_note-26
[27]https://en.wikipedia.org/wiki/CPU_cache#cite_note-27
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=18
Pentium 4https://en.wikipedia.org/wiki/Pentium_4
KiBhttps://en.wikipedia.org/wiki/Kibibyte
[25]https://en.wikipedia.org/wiki/CPU_cache#cite_note-ccs.neu.edu-25
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=19
bus snoopinghttps://en.wikipedia.org/wiki/Bus_snooping
dirty bithttps://en.wikipedia.org/wiki/Dirty_bit
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=20
thread of executionhttps://en.wikipedia.org/wiki/Simultaneous_multithreading
cache performance measurement and metrichttps://en.wikipedia.org/wiki/Cache_performance_measurement_and_metric
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=21
virtual memoryhttps://en.wikipedia.org/wiki/Virtual_memory
address spacehttps://en.wikipedia.org/wiki/Address_space
memory management unithttps://en.wikipedia.org/wiki/Memory_management_unit
translation lookaside bufferhttps://en.wikipedia.org/wiki/Translation_lookaside_buffer
page tablehttps://en.wikipedia.org/wiki/Page_table
GiBhttps://en.wikipedia.org/wiki/Gibibyte
virtual memoryhttps://en.wikipedia.org/wiki/Virtual_memory
IBM M44/44Xhttps://en.wikipedia.org/wiki/IBM_M44/44X
core memoryhttps://en.wikipedia.org/wiki/Core_memory
[28]https://en.wikipedia.org/wiki/CPU_cache#cite_note-28
[NB 1]https://en.wikipedia.org/wiki/CPU_cache#cite_note-31
page tablehttps://en.wikipedia.org/wiki/Page_table
IBM System/360 Model 67https://en.wikipedia.org/wiki/IBM_System/360_Model_67
GE 645https://en.wikipedia.org/wiki/GE_645
IBM System/360 Model 85https://en.wikipedia.org/wiki/IBM_System/360_Model_85
[31]https://en.wikipedia.org/wiki/CPU_cache#cite_note-32
context switchhttps://en.wikipedia.org/wiki/Context_switch
[32]https://en.wikipedia.org/wiki/CPU_cache#cite_note-33
MIPShttps://en.wikipedia.org/wiki/MIPS_architecture
R6000https://en.wikipedia.org/wiki/R6000
[33]https://en.wikipedia.org/wiki/CPU_cache#cite_note-34
emitter-coupled logichttps://en.wikipedia.org/wiki/Emitter-coupled_logic
TLBhttps://en.wikipedia.org/wiki/Translation_lookaside_buffer
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=22
homonymhttps://en.wikipedia.org/wiki/Homonym
synonymhttps://en.wikipedia.org/wiki/Synonym
[34]https://en.wikipedia.org/wiki/CPU_cache#cite_note-35
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=23
content-addressable memoryhttps://en.wikipedia.org/wiki/Content-addressable_memory
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=24
Cache coloringhttps://en.wikipedia.org/wiki/Cache_coloring
loop nest optimizationhttps://en.wikipedia.org/wiki/Loop_nest_optimization
High Performance Computing (HPC)https://en.wikipedia.org/wiki/High_Performance_Computing
birthday paradoxhttps://en.wikipedia.org/wiki/Birthday_paradox
[35]https://en.wikipedia.org/wiki/CPU_cache#cite_note-36
[36]https://en.wikipedia.org/wiki/CPU_cache#cite_note-37
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=25
https://en.wikipedia.org/wiki/File:Hwloc.png
[25]https://en.wikipedia.org/wiki/CPU_cache#cite_note-ccs.neu.edu-25
[8]https://en.wikipedia.org/wiki/CPU_cache#cite_note-:0-8
cache algorithmhttps://en.wikipedia.org/wiki/Cache_algorithm
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=26
pipelinehttps://en.wikipedia.org/wiki/Instruction_pipeline
virtual-to-physicalhttps://en.wikipedia.org/wiki/Virtual_memory
classic RISC pipelinehttps://en.wikipedia.org/wiki/Classic_RISC_pipeline
TLBhttps://en.wikipedia.org/wiki/Translation_lookaside_buffer
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=27
Victim cachehttps://en.wikipedia.org/wiki/Victim_cache
Norman Jouppihttps://en.wikipedia.org/wiki/Norman_Jouppi
[37]https://en.wikipedia.org/wiki/CPU_cache#cite_note-Jouppi1990-38
Crystalwellhttps://en.wikipedia.org/wiki/Crystalwell
[38]https://en.wikipedia.org/wiki/CPU_cache#cite_note-intel-ark-crystal-well-39
Haswellhttps://en.wikipedia.org/wiki/Haswell_(microarchitecture)
eDRAMhttps://en.wikipedia.org/wiki/EDRAM
[39]https://en.wikipedia.org/wiki/CPU_cache#cite_note-anandtech-i74950hq-40
Skylakehttps://en.wikipedia.org/wiki/Skylake_(microarchitecture)
[40]https://en.wikipedia.org/wiki/CPU_cache#cite_note-41
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=28
Trace cachehttps://en.wikipedia.org/wiki/Trace_cache
Intelhttps://en.wikipedia.org/wiki/Intel
Pentium 4https://en.wikipedia.org/wiki/Pentium_4
instructionshttps://en.wikipedia.org/wiki/Instruction_(computer_science)
[41]https://en.wikipedia.org/wiki/CPU_cache#cite_note-42
basic blockshttps://en.wikipedia.org/wiki/Basic_block
micro-operationshttps://en.wikipedia.org/wiki/Micro-operations
[42]https://en.wikipedia.org/wiki/CPU_cache#cite_note-agner.org-43
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=29
[43]https://en.wikipedia.org/wiki/CPU_cache#cite_note-44
AMDhttps://en.wikipedia.org/wiki/AMD
Bulldozer microarchitecturehttps://en.wikipedia.org/wiki/Bulldozer_(microarchitecture)
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=30
[44]https://en.wikipedia.org/wiki/CPU_cache#cite_note-45
micro-operationshttps://en.wikipedia.org/wiki/Micro-operation
instruction decodershttps://en.wikipedia.org/wiki/Instruction_decoder
P6 processor familyhttps://en.wikipedia.org/wiki/P6_(microarchitecture)
[45]https://en.wikipedia.org/wiki/CPU_cache#cite_note-uop-intel-46
Sandy Bridgehttps://en.wikipedia.org/wiki/Sandy_Bridge
Ivy Bridgehttps://en.wikipedia.org/wiki/Ivy_Bridge_(microarchitecture)
Haswellhttps://en.wikipedia.org/wiki/Haswell_(microarchitecture)
[42]https://en.wikipedia.org/wiki/CPU_cache#cite_note-agner.org-43
[46]https://en.wikipedia.org/wiki/CPU_cache#cite_note-anandtech-haswell-47
Zen microarchitecturehttps://en.wikipedia.org/wiki/Zen_(microarchitecture)
[47]https://en.wikipedia.org/wiki/CPU_cache#cite_note-48
power consumptionhttps://en.wikipedia.org/wiki/Power_consumption
[45]https://en.wikipedia.org/wiki/CPU_cache#cite_note-uop-intel-46
[46]https://en.wikipedia.org/wiki/CPU_cache#cite_note-anandtech-haswell-47
heuristichttps://en.wikipedia.org/wiki/Heuristic
[48]https://en.wikipedia.org/wiki/CPU_cache#cite_note-tc-slides-49
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=31
ARM microprocessorshttps://en.wikipedia.org/wiki/ARM_microprocessors
[49]https://en.wikipedia.org/wiki/CPU_cache#cite_note-50
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=32
level 2https://en.wikipedia.org/wiki/CPU_cache#MULTILEVEL
level 3https://en.wikipedia.org/wiki/CPU_cache#MULTILEVEL
Intelhttps://en.wikipedia.org/wiki/Intel
multi-core processorhttps://en.wikipedia.org/wiki/Multi-core_processor
cache misshttps://en.wikipedia.org/wiki/Cache_miss
[50]https://en.wikipedia.org/wiki/CPU_cache#cite_note-51
[51]https://en.wikipedia.org/wiki/CPU_cache#cite_note-52
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=33
Cache hierarchyhttps://en.wikipedia.org/wiki/Cache_hierarchy
eDRAMhttps://en.wikipedia.org/wiki/EDRAM
multi-chip modulehttps://en.wikipedia.org/wiki/Multi-chip_module
IBM z15https://en.wikipedia.org/wiki/IBM_z15_(microprocessor)
SRAMhttps://en.wikipedia.org/wiki/Static_random-access_memory
citation neededhttps://en.wikipedia.org/wiki/Wikipedia:Citation_needed
Apple'shttps://en.wikipedia.org/wiki/Apple_Inc
ARM-basedhttps://en.wikipedia.org/wiki/ARM_architecture_family
Apple siliconhttps://en.wikipedia.org/wiki/Apple_silicon
A14https://en.wikipedia.org/wiki/Apple_A14
M1https://en.wikipedia.org/wiki/Apple_M1
Intelhttps://en.wikipedia.org/wiki/Intel
Lunar Lakehttps://en.wikipedia.org/wiki/Lunar_Lake
Qualcommhttps://en.wikipedia.org/wiki/Qualcomm
Oryonhttps://en.wikipedia.org/wiki/Oryon
Alpha 21164https://en.wikipedia.org/wiki/Alpha_21164
AMD K6-IIIhttps://en.wikipedia.org/wiki/AMD_K6-III
POWER4https://en.wikipedia.org/wiki/POWER4
Itanium 2https://en.wikipedia.org/wiki/Itanium_2
unifiedhttps://en.wikipedia.org/w/index.php?title=Unified_cache&action=edit&redlink=1
Itanium 2https://en.wikipedia.org/wiki/Itanium_2
multi-chip modulehttps://en.wikipedia.org/wiki/Multi-chip_module
Xeonhttps://en.wikipedia.org/wiki/Xeon
AMD Phenomhttps://en.wikipedia.org/wiki/AMD_Phenom
Phenom IIhttps://en.wikipedia.org/wiki/Phenom_II
Intel Core i7https://en.wikipedia.org/wiki/List_of_Intel_Core_i7_processors
Haswellhttps://en.wikipedia.org/wiki/Haswell_(microarchitecture)
Intel Iris Pro Graphicshttps://en.wikipedia.org/wiki/Intel_Iris_Pro_Graphics
[52]https://en.wikipedia.org/wiki/CPU_cache#cite_note-53
register filehttps://en.wikipedia.org/wiki/Register_file
loop nest optimizationhttps://en.wikipedia.org/wiki/Loop_nest_optimization
register renaminghttps://en.wikipedia.org/wiki/Register_renaming
Cray-1https://en.wikipedia.org/wiki/Cray-1
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=34
multiple coreshttps://en.wikipedia.org/wiki/Multi-core_processor
[53]https://en.wikipedia.org/wiki/CPU_cache#cite_note-54
[54]https://en.wikipedia.org/wiki/CPU_cache#cite_note-55
[8]https://en.wikipedia.org/wiki/CPU_cache#cite_note-:0-8
[55]https://en.wikipedia.org/wiki/CPU_cache#cite_note-56
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=35
translation lookaside buffershttps://en.wikipedia.org/wiki/Translation_lookaside_buffer
[56]https://en.wikipedia.org/wiki/CPU_cache#cite_note-57
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=36
AMD Athlonhttps://en.wikipedia.org/wiki/AMD_Athlon
Pentium IIhttps://en.wikipedia.org/wiki/Pentium_II
IIIhttps://en.wikipedia.org/wiki/Pentium_III
4https://en.wikipedia.org/wiki/Pentium_4
[57]https://en.wikipedia.org/wiki/CPU_cache#cite_note-58
[58]https://en.wikipedia.org/wiki/CPU_cache#cite_note-ispass04-59
[58]https://en.wikipedia.org/wiki/CPU_cache#cite_note-ispass04-59
[58]https://en.wikipedia.org/wiki/CPU_cache#cite_note-ispass04-59
[59]https://en.wikipedia.org/wiki/CPU_cache#cite_note-60
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=37
Scratchpad memoryhttps://en.wikipedia.org/wiki/Scratchpad_memory
Scratchpad memoryhttps://en.wikipedia.org/wiki/Scratchpad_memory
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=38
Athlon 64https://en.wikipedia.org/wiki/Athlon_64
[60]https://en.wikipedia.org/wiki/CPU_cache#cite_note-61
https://en.wikipedia.org/wiki/File:Cache,hierarchy-example.svg
TLBhttps://en.wikipedia.org/wiki/Translation_lookaside_buffer
parityhttps://en.wikipedia.org/wiki/Parity_bit
ECChttps://en.wikipedia.org/wiki/Error-correcting_code
branch predictionhttps://en.wikipedia.org/wiki/Branch_prediction
alpha particlehttps://en.wikipedia.org/wiki/Alpha_particle
ECChttps://en.wikipedia.org/wiki/Error-correcting_code
parityhttps://en.wikipedia.org/wiki/Parity_(telecommunication)
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=39
DEChttps://en.wikipedia.org/wiki/Digital_Equipment_Corporation
Alpha 21264https://en.wikipedia.org/wiki/Alpha_21264
coherenthttps://en.wikipedia.org/wiki/Cache_coherency
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=40
https://en.wikipedia.org/wiki/File:Medion_9901_-_Intel_Pentium_III_SL35E_-_TagRAM_chip_SL3F5-1387.jpg
Intel Pentium IIIhttps://en.wikipedia.org/wiki/Pentium_III
[61]https://en.wikipedia.org/wiki/CPU_cache#cite_note-62
[62]https://en.wikipedia.org/wiki/CPU_cache#cite_note-63
SRAMhttps://en.wikipedia.org/wiki/Static_random-access_memory
associative cacheshttps://en.wikipedia.org/wiki/CPU_cache#Associativity
content-addressable memoryhttps://en.wikipedia.org/wiki/Content-addressable_memory
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=41
Cache algorithmshttps://en.wikipedia.org/wiki/Cache_algorithms
https://en.wikipedia.org/wiki/File:Cache,associative-read.svg
multiplexinghttps://en.wikipedia.org/wiki/Multiplexing
sum-addressed decoderhttps://en.wikipedia.org/wiki/Sum-addressed_decoder
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=42
citation neededhttps://en.wikipedia.org/wiki/Wikipedia:Citation_needed
disputedhttps://en.wikipedia.org/wiki/Wikipedia:Disputed_statement
discusshttps://en.wikipedia.org/wiki/Talk:CPU_cache#Talk:CPU_cache#Dispute_sequence_of_events_for_paging
registerhttps://en.wikipedia.org/wiki/Processor_register
[63]https://en.wikipedia.org/wiki/CPU_cache#cite_note-64
frequencyhttps://en.wikipedia.org/wiki/Frequency
bottleneckhttps://en.wikipedia.org/wiki/Von_Neumann_architecture#Von_Neumann_bottleneck
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=43
GE 645https://en.wikipedia.org/wiki/GE_645
[64]https://en.wikipedia.org/wiki/CPU_cache#cite_note-65
IBMhttps://en.wikipedia.org/wiki/IBM
360/67https://en.wikipedia.org/wiki/IBM_System/360_Model_67
[65]https://en.wikipedia.org/wiki/CPU_cache#cite_note-66
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=44
CDC 6600https://en.wikipedia.org/wiki/CDC_6600
[66]https://en.wikipedia.org/wiki/CPU_cache#cite_note-67
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=45
IBMhttps://en.wikipedia.org/wiki/IBM
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edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=46
68010https://en.wikipedia.org/wiki/68010
68020https://en.wikipedia.org/wiki/68020
68030https://en.wikipedia.org/wiki/68030
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68040https://en.wikipedia.org/wiki/Motorola_68040
68060https://en.wikipedia.org/wiki/68060
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=47
https://en.wikipedia.org/wiki/File:Motherboard_Intel_386.jpg
i386https://en.wikipedia.org/wiki/I386
SIMMshttps://en.wikipedia.org/wiki/SIMM
Austekhttps://en.wikipedia.org/wiki/Austek_Microsystems
x86https://en.wikipedia.org/wiki/X86
386https://en.wikipedia.org/wiki/Intel_80386
DRAMhttps://en.wikipedia.org/wiki/DRAM
SRAMhttps://en.wikipedia.org/wiki/Static_random-access_memory
memory cellshttps://en.wikipedia.org/wiki/Memory_cell_(computing)
DIPhttps://en.wikipedia.org/wiki/Dual_in-line_package
486https://en.wikipedia.org/wiki/Intel_80486
daughtercardhttps://en.wikipedia.org/wiki/Expansion_card#Daughterboard
[68]https://en.wikipedia.org/wiki/CPU_cache#cite_note-69
[69]https://en.wikipedia.org/wiki/CPU_cache#cite_note-70
Pentium MMXhttps://en.wikipedia.org/wiki/Intel_P5
SDRAMhttps://en.wikipedia.org/wiki/SDRAM
Pentium Prohttps://en.wikipedia.org/wiki/Pentium_Pro
AMD K6-2https://en.wikipedia.org/wiki/AMD_K6-2
AMD K6-IIIhttps://en.wikipedia.org/wiki/AMD_K6-III
Socket 7https://en.wikipedia.org/wiki/Socket_7
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[71]https://en.wikipedia.org/wiki/CPU_cache#cite_note-72
Intelhttps://en.wikipedia.org/wiki/Intel
Haswellhttps://en.wikipedia.org/wiki/Haswell_(microarchitecture)
microarchitecturehttps://en.wikipedia.org/wiki/Microarchitecture
Crystalwellhttps://en.wikipedia.org/wiki/Crystalwell
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GT3ehttps://en.wikipedia.org/wiki/GT3e
eDRAMhttps://en.wikipedia.org/wiki/EDRAM
victim cachehttps://en.wikipedia.org/wiki/Victim_cache
[39]https://en.wikipedia.org/wiki/CPU_cache#cite_note-anandtech-i74950hq-40
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=48
Apple M1https://en.wikipedia.org/wiki/Apple_M1
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=49
RAMhttps://en.wikipedia.org/wiki/Random-access_memory
energy efficiencyhttps://en.wikipedia.org/wiki/Low-power_electronics
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[73]https://en.wikipedia.org/wiki/CPU_cache#cite_note-74
[74]https://en.wikipedia.org/wiki/CPU_cache#cite_note-75
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=50
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=51
Branch predictorhttps://en.wikipedia.org/wiki/Branch_predictor
Cache (computing)https://en.wikipedia.org/wiki/Cache_(computing)
Cache algorithmshttps://en.wikipedia.org/wiki/Cache_algorithms
Cache coherencehttps://en.wikipedia.org/wiki/Cache_coherence
Cache control instructionshttps://en.wikipedia.org/wiki/Cache_control_instruction
Cache hierarchyhttps://en.wikipedia.org/wiki/Cache_hierarchy
Cache placement policieshttps://en.wikipedia.org/wiki/Cache_placement_policies
Cache prefetchinghttps://en.wikipedia.org/wiki/Cache_prefetching
Dinero (cache simulator)https://en.wikipedia.org/wiki/Dinero_(cache_simulator)
Instruction unithttps://en.wikipedia.org/wiki/Instruction_unit
Locality of referencehttps://en.wikipedia.org/wiki/Locality_of_reference
Memoizationhttps://en.wikipedia.org/wiki/Memoization
Memory hierarchyhttps://en.wikipedia.org/wiki/Memory_hierarchy
Micro-operationhttps://en.wikipedia.org/wiki/Micro-operation
No-write allocationhttps://en.wikipedia.org/wiki/No-write_allocation
Scratchpad RAMhttps://en.wikipedia.org/wiki/Scratchpad_RAM
Sum-addressed decoderhttps://en.wikipedia.org/wiki/Sum-addressed_decoder
Write bufferhttps://en.wikipedia.org/wiki/Write_buffer
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Ferrantihttps://en.wikipedia.org/wiki/Ferranti
Atlashttps://en.wikipedia.org/wiki/Atlas_Computer_(Manchester)
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[30]https://en.wikipedia.org/wiki/CPU_cache#cite_note-AtlasSup-30
edithttps://en.wikipedia.org/w/index.php?title=CPU_cache&action=edit§ion=53
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"How The Cache Memory Works"https://hardwaresecrets.com/how-the-cache-memory-works/
^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-2
"Survey of CPU Cache-Based Side-Channel Attacks: Systematic Analysis, Security Models, and Countermeasures"https://doi.org/10.1155%2F2021%2F5559552
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ISSNhttps://en.wikipedia.org/wiki/ISSN_(identifier)
1939-0122https://search.worldcat.org/issn/1939-0122
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"Atlas 2 at Cambridge Mathematical Laboratory (and Aldermaston and CAD Centre)"http://www.chilton-computing.org.uk/acl/technology/atlas50th/p005.htm
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"IBM System/360 Model 85 Functional Characteristics"http://www.bitsavers.org/pdf/ibm/360/functional_characteristics/A22-6916-1_360-85_funcChar_Jun68.pdf
IBMhttps://en.wikipedia.org/wiki/IBM
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"Structural aspects of the System/360 Model 85 - Part II The cache"https://www.andrew.cmu.edu/course/15-440/assets/READINGS/liptay1968.pdf
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10.1147/sj.71.0015https://doi.org/10.1147%2Fsj.71.0015
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"Cache Memories"http://home.eng.iastate.edu/~zzhang/courses/cpre585-f03/reading/smith-csur82-cache.pdf
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10.1145/356887.356892https://doi.org/10.1145%2F356887.356892
S2CIDhttps://en.wikipedia.org/wiki/S2CID_(identifier)
6023466https://api.semanticscholar.org/CorpusID:6023466
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chttps://en.wikipedia.org/wiki/CPU_cache#cite_ref-:0_8-2
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Computer Architecture: A Quantitative Approachhttps://books.google.com/books?id=v3-1hVwHnHwC&q=Hennessey+%22block+offset%22&pg=PA120
ISBNhttps://en.wikipedia.org/wiki/ISBN_(identifier)
978-0-12-383872-8https://en.wikipedia.org/wiki/Special:BookSources/978-0-12-383872-8
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"IBM z13 and IBM z13s Technical Introduction"https://www.redbooks.ibm.com/redbooks/pdfs/sg248250.pdf
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"Product Fact Sheet: Accelerating 5G Network Infrastructure, from the Core to the Edge"https://www.intel.com/content/www/us/en/newsroom/news/product-fact-sheet-accelerating-5g-network-infrastructure-core-edge.html
^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-11
"Intel Launches Atom P5900: A 10nm Atom for Radio Access Networks"https://web.archive.org/web/20200224143422/https://www.anandtech.com/show/15544/intel-launches-atom-p5900-a-10nm-atom-for-radio-access-networks
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"Cache design"https://cseweb.ucsd.edu/classes/fa10/cse240a/pdf/08/CSE240A-MBT-L15-Cache.ppt.pdf
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"Power Management of the Third Generation Intel Core Micro Architecture formerly codenamed Ivy Bridge"https://web.archive.org/web/20200729002711/http://hotchips.org/wp-content/uploads/hc_archives/hc24/HC24-1-Microprocessor/HC24.28.117-HotChips_IvyBridge_Power_04.pdf#page=18
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"A Case for Two-Way Skewed-Associative Caches"https://doi.org/10.1145%2F173682.165152
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10.1145/173682.165152https://doi.org/10.1145%2F173682.165152
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"Lecture 3: Advanced Caching Techniques"https://web.archive.org/web/20120907012034/http://www.stanford.edu/class/ee282/08_handouts/L03-Cache.pdf
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1997IMicr..17e..40Chttps://ui.adsabs.harvard.edu/abs/1997IMicr..17e..40C
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10.1109/40.621212https://doi.org/10.1109%2F40.621212
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"ARM Cortex-R Series Programmer's Guide"https://developer.arm.com/documentation/den0042/latest
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"Way-predicting cache memory"https://patents.google.com/patent/US6425055B1/en
^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-21
"Reconfigurable multi-way associative cache memory"https://patents.google.com/patent/US5367653A/en
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"US Patent Application for DYNAMIC CACHE REPLACEMENT WAY SELECTION BASED ON ADDRESS TAG BITS Patent Application (Application #20160350229 issued December 1, 2016) – Justia Patents Search"https://patents.justia.com/patent/20160350229
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"Choosing an Error Protection Scheme for a Microprocessor's L1 Data Cache"https://people.ee.duke.edu/~sorin/papers/iccd06_perc.pdf
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Computer Organization and Design: The Hardware/Software Interfacehttps://books.google.com/books?id=3b63x-0P3_UC&q=Hennessey+%22block+offset%22&pg=PA484
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"Cache Basics"http://www.ccs.neu.edu/course/com3200/parent/NOTES/cache-basics.html
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"Concerning Cache"http://www.cs.washington.edu/education/courses/cse378/02sp/sections/section9-1.html
^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-27
Memory Systems and Pipelined Processorshttps://books.google.com/books?id=q2w3JSFD7l4C&dq=displacement+tag+cache&pg=PA209
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^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-AtlasSup_30-0
"The Atlas Supervisor"http://www.chilton-computing.org.uk/acl/technology/atlas/p019.htm
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CiteSeerXhttps://en.wikipedia.org/wiki/CiteSeerX_(identifier)
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"Understanding Caching"http://www.linuxjournal.com/article/7105
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10.1145/325096.325161https://doi.org/10.1145%2F325096.325161
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"Advanced Operating Systems Caches and TLBs (263-3800-00L)"https://web.archive.org/web/20111007150424/http://www.systems.ethz.ch/education/past-courses/fs09/aos/lectures/wk3-print.pdf
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10.1109/HPCA.2008.4658653https://doi.org/10.1109%2FHPCA.2008.4658653
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"Letter to Jiang Lin"https://web.archive.org/web/20240121121148/http://web.cse.ohio-state.edu/~zhang.574/OS-cache-software_intel_2010.pdf
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doihttps://en.wikipedia.org/wiki/Doi_(identifier)
10.1109/ISCA.1990.134547https://doi.org/10.1109%2FISCA.1990.134547
ahttps://en.wikipedia.org/wiki/CPU_cache#cite_ref-intel-ark-crystal-well_39-0
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"Products (Formerly Crystal Well)"https://web.archive.org/web/20130929042810/http://ark.intel.com/products/codename/51802/Crystal-Well
Intelhttps://en.wikipedia.org/wiki/Intel
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"Intel Iris Pro 5200 Graphics Review: Core i7-4950HQ Tested"https://archive.today/20130915191303/http://www.anandtech.com/show/6993/intel-iris-pro-5200-graphics-review-core-i74950hq-tested/3
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"The Intel Skylake Mobile and Desktop Launch, with Architecture Analysis"https://web.archive.org/web/20150904211611/http://www.anandtech.com/show/9582/intel-skylake-mobile-desktop-launch-architecture-analysis/5
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^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-42
"The Pentium 4's Cache – Intel Pentium 4 1.4 GHz & 1.5 GHz"https://web.archive.org/web/20100526025110/http://www.anandtech.com/show/661/5
AnandTechhttps://en.wikipedia.org/wiki/AnandTech
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Fog, Agnerhttps://en.wikipedia.org/wiki/Agner_Fog
"The microarchitecture of Intel, AMD and VIA CPUs: An optimization guide for assembly programmers and compiler makers"http://www.agner.org/optimize/microarchitecture.pdf
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"AMD's Bulldozer Microarchitecture – Memory Subsystem Continued"http://www.realworldtech.com/bulldozer/9/
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"Intel's Sandy Bridge Microarchitecture – Instruction Decode and uop Cache"http://www.realworldtech.com/sandy-bridge/4/
ahttps://en.wikipedia.org/wiki/CPU_cache#cite_ref-uop-intel_46-0
bhttps://en.wikipedia.org/wiki/CPU_cache#cite_ref-uop-intel_46-1
"Micro-Operation Cache: A Power Aware Frontend for Variable Instruction Length ISA"http://cecs.uci.edu/~papers/compendium94-03/papers/2001/islped01/pdffiles/p004.pdf
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10.1109/LPE.2001.945363https://doi.org/10.1109%2FLPE.2001.945363
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978-1-58113-371-4https://en.wikipedia.org/wiki/Special:BookSources/978-1-58113-371-4
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"Intel's Haswell Architecture Analyzed"https://archive.today/20130628103529/http://www.anandtech.com/show/6355/intels-haswell-architecture/6
AnandTechhttps://en.wikipedia.org/wiki/AnandTech
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"AMD Zen Microarchitecture: Dual Schedulers, Micro-Op Cache and Memory Hierarchy Revealed"https://archive.today/20160818171527/http://www.anandtech.com/show/10578/amd-zen-microarchitecture-dual-schedulers-micro-op-cache-memory-hierarchy-revealed
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"Trace Cache"https://www.cs.cmu.edu/afs/cs/academic/class/15740-f03/www/lectures/TraceCache_slides.pdf
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"How does the BTIC (branch target instruction cache) work?"https://web.archive.org/web/20180407185816/https://community.arm.com/processors/f/discussions/5320/how-does-the-btic-branch-target-instruction-cache-works
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"Intel Smart Cache: Demo"http://www.intel.com/content/www/us/en/architecture-and-technology/intel-smart-cache.html
Intelhttps://en.wikipedia.org/wiki/Intel
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"Inside Intel Core Microarchitecture and Smart Memory Access"https://web.archive.org/web/20111229193036/http://software.intel.com/file/18374/
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^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-53
"Intel Iris Pro 5200 Graphics Review: Core i7-4950HQ Tested"https://archive.today/20130915191303/http://www.anandtech.com/show/6993/intel-iris-pro-5200-graphics-review-core-i74950hq-tested/3
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^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-54
"Software Techniques for Shared-Cache Multi-Core Systems"https://software.intel.com/en-us/articles/software-techniques-for-shared-cache-multi-core-systems
Intelhttps://en.wikipedia.org/wiki/Intel
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"Cornell Virtual Workshop > Introduction to Advanced Cluster Architectures > Memory, Cache, Interconnects > Last Level Cache"https://cvw.cac.cornell.edu/clusterarch/memory-cache-interconnects/last-level-cache
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"2nd Generation Intel Core Processor Family: Intel Core i7, i5 and i3"https://web.archive.org/web/20200729000210/http://www.hotchips.org/wp-content/uploads/hc_archives/hc23/HC23.19.9-Desktop-CPUs/HC23.19.911-Sandy-Bridge-Lempel-Intel-Rev%207.pdf
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^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-57
"A Simulation Based Study of TLB Performance"https://doi.org/10.1145%2F146628.139708
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10.1145/146628.139708https://doi.org/10.1145%2F146628.139708
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"Explanation of the L1 and L2 Cache"https://web.archive.org/web/20140714181050/http://www.amecomputers.com/explanation-of-the-l1-and-l2-cache.html
the originalhttp://www.amecomputers.com/explanation-of-the-l1-and-l2-cache.html
ahttps://en.wikipedia.org/wiki/CPU_cache#cite_ref-ispass04_59-0
bhttps://en.wikipedia.org/wiki/CPU_cache#cite_ref-ispass04_59-1
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Performance Evaluation of Exclusive Cache Hierarchieshttps://web.archive.org/web/20120813003941/http://mercury.pr.erau.edu/~davisb22/papers/ispass04.pdf
doihttps://en.wikipedia.org/wiki/Doi_(identifier)
10.1109/ISPASS.2004.1291359https://doi.org/10.1109%2FISPASS.2004.1291359
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0-7803-8385-0https://en.wikipedia.org/wiki/Special:BookSources/0-7803-8385-0
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"Achieving Non-Inclusive Cache Performance with Inclusive Caches"http://www.jaleels.org/ajaleel/publications/micro2010-tla.pdf
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"AMD K8"https://web.archive.org/web/20070515052223/http://www.sandpile.org/impl/k8.htm
the originalhttp://www.sandpile.org/impl/k8.htm
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"Cortex-R4 and Cortex-R4F Technical Reference Manual"http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0363g/Chdijaed.html
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"L210 Cache Controller Technical Reference Manual"http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0284g/Ebddefci.html
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"The processor-memory bottleneck: problems and solutions"https://web.archive.org/web/20140305193233/https://epic.hpi.uni-potsdam.de/pub/Home/TrendsAndConceptsII2010/HW_Trends_The_Processor-Memory_bottleneck___Problems_and_Solutions..pdf
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10.1145/357783.331677https://doi.org/10.1145%2F357783.331677
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^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-65
GE-645 System Manualhttp://bitsavers.org/pdf/ge/GE-645/LSB0468_GE-645_System_Manual_Jan1968.pdf
General Electrichttps://en.wikipedia.org/wiki/General_Electric
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IBM System/360 Model 67 Functional Characteristicshttp://www.bitsavers.org/pdf/ibm/360/functional_characteristics/GA27-2719-2_360-67_funcChar.pdf
IBMhttps://en.wikipedia.org/wiki/IBM
^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-67
"Parallel operation in the control data 6600"https://cs.uwaterloo.ca/~mashti/cs850-f18/papers/cdc6600.pdf
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IBM System/360 Model 85 Functional Characteristicshttp://www.bitsavers.org/pdf/ibm/360/functional_characteristics/A22-6916-1_360-85_funcChar_Jun68.pdf
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^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-70
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"Intel Xeon Foster MP microprocessor family"https://web.archive.org/web/20230715081932/https://www.cpu-world.com/CPUs/Xeon/TYPE-Xeon%20Foster%20MP.html
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Intelhttps://en.wikipedia.org/wiki/Intel
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^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-73
"Chip Design Thwarts Sneak Attack on Data"https://spectrum.ieee.org/chip-design-thwarts-sneak-attack-on-data
IEEE Spectrumhttps://en.wikipedia.org/wiki/IEEE_Spectrum
doihttps://en.wikipedia.org/wiki/Doi_(identifier)
10.1109/MSPEC.2009.5292036https://doi.org/10.1109%2FMSPEC.2009.5292036
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A novel cache architecture with enhanced performance and securityhttp://palms.princeton.edu/system/files/Micro08_Newcache.pdf
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^https://en.wikipedia.org/wiki/CPU_cache#cite_ref-75
"CACTI"https://web.archive.org/web/20230129180912/https://www.hpl.hp.com/research/cacti/
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Microprocessor Designhttps://en.wikibooks.org/wiki/Microprocessor_Design
Cachehttps://en.wikibooks.org/wiki/Microprocessor_Design/Cache
Memory part 2: CPU cacheshttps://lwn.net/Articles/252125/
Evaluating Associativity in CPU Cacheshttps://minds.wisconsin.edu/bitstream/handle/1793/59076/TR823.pdf
Cache Performance for SPEC CPU2000 Benchmarkshttp://www.cs.wisc.edu/multifacet/misc/spec2000cache-data/
Memory Hierarchy in Cache-Based Systemshttp://www.sun.com/blueprints/1102/817-0742.pdf
Archivedhttps://web.archive.org/web/20090915041601/http://www.sun.com/blueprints/1102/817-0742.pdf
Wayback Machinehttps://en.wikipedia.org/wiki/Wayback_Machine
A Cache Primerhttps://www.nxp.com/docs/en/application-note/AN2663.pdf
An 8-way set-associative cachehttps://web.archive.org/web/20110718154522/http://www.zipcores.com/skin1/zipdocs/datasheets/cache_8way_set.pdf
VHDLhttps://en.wikipedia.org/wiki/VHDL
Understanding CPU caching and performancehttps://arstechnica.com/old/content/2002/07/caching.ars
IBM POWER4 processor reviewhttp://ixbtlabs.com/articles/ibmpower4/
What is Cache Memory and its Types!https://www.kivabe.in/2020/07/Cache-memory-ki.html/
Memory Cachinghttps://www.cs.princeton.edu/courses/archive/fall15/cos375/lectures/16-Cache-2x2.pdf
CPU Cache Flushing Fallacyhttps://mechanical-sympathy.blogspot.com/2013/02/cpu-cache-flushing-fallacy.html
vhttps://en.wikipedia.org/wiki/Template:Processor_technologies
thttps://en.wikipedia.org/wiki/Template_talk:Processor_technologies
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Modelshttps://en.wikipedia.org/wiki/Model_of_computation
Abstract machinehttps://en.wikipedia.org/wiki/Abstract_machine
Stored-program computerhttps://en.wikipedia.org/wiki/Stored-program_computer
Finite-state machinehttps://en.wikipedia.org/wiki/Finite-state_machine
with datapathhttps://en.wikipedia.org/wiki/Finite-state_machine_with_datapath
Hierarchicalhttps://en.wikipedia.org/wiki/Hierarchical_state_machine
Deterministic finite automatonhttps://en.wikipedia.org/wiki/Deterministic_finite_automaton
Queue automatonhttps://en.wikipedia.org/wiki/Queue_automaton
Cellular automatonhttps://en.wikipedia.org/wiki/Cellular_automaton
Quantum cellular automatonhttps://en.wikipedia.org/wiki/Quantum_cellular_automaton
Turing machinehttps://en.wikipedia.org/wiki/Turing_machine
Alternating Turing machinehttps://en.wikipedia.org/wiki/Alternating_Turing_machine
Universalhttps://en.wikipedia.org/wiki/Universal_Turing_machine
Post–Turinghttps://en.wikipedia.org/wiki/Post%E2%80%93Turing_machine
Quantumhttps://en.wikipedia.org/wiki/Quantum_Turing_machine
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Probabilistic Turing machinehttps://en.wikipedia.org/wiki/Probabilistic_Turing_machine
Hypercomputationhttps://en.wikipedia.org/wiki/Hypercomputation
Zeno machinehttps://en.wikipedia.org/wiki/Zeno_machine
Belt machinehttps://en.wikipedia.org/wiki/History_of_general-purpose_CPUs#Belt_machine_architecture
Stack machinehttps://en.wikipedia.org/wiki/Stack_machine
Register machineshttps://en.wikipedia.org/wiki/Register_machine
Counterhttps://en.wikipedia.org/wiki/Counter_machine
Pointerhttps://en.wikipedia.org/wiki/Pointer_machine
Random-accesshttps://en.wikipedia.org/wiki/Random-access_machine
Random-access stored programhttps://en.wikipedia.org/wiki/Random-access_stored-program_machine
Architecturehttps://en.wikipedia.org/wiki/Computer_architecture
Microarchitecturehttps://en.wikipedia.org/wiki/Microarchitecture
Von Neumannhttps://en.wikipedia.org/wiki/Von_Neumann_architecture
Harvardhttps://en.wikipedia.org/wiki/Harvard_architecture
modifiedhttps://en.wikipedia.org/wiki/Modified_Harvard_architecture
Dataflowhttps://en.wikipedia.org/wiki/Dataflow_architecture
Transport-triggeredhttps://en.wikipedia.org/wiki/Transport_triggered_architecture
Cellularhttps://en.wikipedia.org/wiki/Cellular_architecture
Endiannesshttps://en.wikipedia.org/wiki/Endianness
Memory accesshttps://en.wikipedia.org/wiki/Computer_data_storage
NUMAhttps://en.wikipedia.org/wiki/Non-uniform_memory_access
HUMAhttps://en.wikipedia.org/wiki/Uniform_memory_access
Load–storehttps://en.wikipedia.org/wiki/Load%E2%80%93store_architecture
Register/memoryhttps://en.wikipedia.org/wiki/Register%E2%80%93memory_architecture
Cache hierarchyhttps://en.wikipedia.org/wiki/Cache_hierarchy
Memory hierarchyhttps://en.wikipedia.org/wiki/Memory_hierarchy
Virtual memoryhttps://en.wikipedia.org/wiki/Virtual_memory
Secondary storagehttps://en.wikipedia.org/wiki/Secondary_storage
Heterogeneoushttps://en.wikipedia.org/wiki/Heterogeneous_System_Architecture
Fabrichttps://en.wikipedia.org/wiki/Fabric_computing
Multiprocessinghttps://en.wikipedia.org/wiki/Multiprocessing
Cognitivehttps://en.wikipedia.org/wiki/Cognitive_computing
Neuromorphichttps://en.wikipedia.org/wiki/Neuromorphic_engineering
Instruction setarchitectureshttps://en.wikipedia.org/wiki/Instruction_set_architecture
Orthogonal instruction sethttps://en.wikipedia.org/wiki/Orthogonal_instruction_set
CISChttps://en.wikipedia.org/wiki/Complex_instruction_set_computer
RISChttps://en.wikipedia.org/wiki/Reduced_instruction_set_computer
Application-specifichttps://en.wikipedia.org/wiki/Application-specific_instruction_set_processor
EDGEhttps://en.wikipedia.org/wiki/Explicit_data_graph_execution
TRIPShttps://en.wikipedia.org/wiki/TRIPS_architecture
VLIWhttps://en.wikipedia.org/wiki/Very_long_instruction_word
EPIChttps://en.wikipedia.org/wiki/Explicitly_parallel_instruction_computing
MISChttps://en.wikipedia.org/wiki/Minimal_instruction_set_computer
OISChttps://en.wikipedia.org/wiki/One-instruction_set_computer
NISChttps://en.wikipedia.org/wiki/No_instruction_set_computing
ZISChttps://en.wikipedia.org/wiki/Zero_instruction_set_computer
VISC architecturehttps://en.wikipedia.org/wiki/VISC_architecture
Quantum computinghttps://en.wikipedia.org/wiki/Quantum_computing
Comparisonhttps://en.wikipedia.org/wiki/Comparison_of_instruction_set_architectures
Addressing modeshttps://en.wikipedia.org/wiki/Addressing_mode
Motorola 68000 serieshttps://en.wikipedia.org/wiki/Motorola_68000_series
VAXhttps://en.wikipedia.org/wiki/VAX
PDP-11https://en.wikipedia.org/wiki/PDP-11_architecture
x86https://en.wikipedia.org/wiki/X86
ARMhttps://en.wikipedia.org/wiki/ARM_architecture_family
Stanford MIPShttps://en.wikipedia.org/wiki/Stanford_MIPS
MIPShttps://en.wikipedia.org/wiki/MIPS_architecture
MIPS-Xhttps://en.wikipedia.org/wiki/MIPS-X
POWERhttps://en.wikipedia.org/wiki/IBM_POWER_architecture
PowerPChttps://en.wikipedia.org/wiki/PowerPC
Power ISAhttps://en.wikipedia.org/wiki/Power_ISA
Clipper architecturehttps://en.wikipedia.org/wiki/Clipper_architecture
SPARChttps://en.wikipedia.org/wiki/SPARC
SuperHhttps://en.wikipedia.org/wiki/SuperH
DEC Alphahttps://en.wikipedia.org/wiki/DEC_Alpha
ETRAX CRIShttps://en.wikipedia.org/wiki/ETRAX_CRIS
M32Rhttps://en.wikipedia.org/wiki/M32R
Unicorehttps://en.wikipedia.org/wiki/Unicore
Itaniumhttps://en.wikipedia.org/wiki/IA-64
OpenRISChttps://en.wikipedia.org/wiki/OpenRISC
RISC-Vhttps://en.wikipedia.org/wiki/RISC-V
MicroBlazehttps://en.wikipedia.org/wiki/MicroBlaze
LMChttps://en.wikipedia.org/wiki/Little_man_computer
S/360https://en.wikipedia.org/wiki/IBM_System/360_architecture
S/370https://en.wikipedia.org/wiki/IBM_System/370
S/390https://en.wikipedia.org/wiki/IBM_System/390
z/Architecturehttps://en.wikipedia.org/wiki/Z/Architecture
VISC architecturehttps://en.wikipedia.org/wiki/VISC_architecture
Epiphany architecturehttps://en.wikipedia.org/wiki/Adapteva#Products
Othershttps://en.wikipedia.org/wiki/Comparison_of_instruction_set_architectures
Executionhttps://en.wikipedia.org/wiki/Instruction_cycle
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Pipeline stallhttps://en.wikipedia.org/wiki/Pipeline_stall
Operand forwardinghttps://en.wikipedia.org/wiki/Operand_forwarding
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Hazardshttps://en.wikipedia.org/wiki/Hazard_(computer_architecture)
Data dependencyhttps://en.wikipedia.org/wiki/Data_dependency
Structuralhttps://en.wikipedia.org/wiki/Structural_hazard
Controlhttps://en.wikipedia.org/wiki/Control_hazard
False sharinghttps://en.wikipedia.org/wiki/False_sharing
Out-of-orderhttps://en.wikipedia.org/wiki/Out-of-order_execution
Scoreboardinghttps://en.wikipedia.org/wiki/Scoreboarding
Tomasulo's algorithmhttps://en.wikipedia.org/wiki/Tomasulo%27s_algorithm
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Re-order bufferhttps://en.wikipedia.org/wiki/Re-order_buffer
Register renaminghttps://en.wikipedia.org/wiki/Register_renaming
Wide-issuehttps://en.wikipedia.org/wiki/Wide-issue
Speculativehttps://en.wikipedia.org/wiki/Speculative_execution
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Threadhttps://en.wikipedia.org/wiki/Thread_(computing)
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SWARhttps://en.wikipedia.org/wiki/SWAR
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SPMDhttps://en.wikipedia.org/wiki/Single_program,_multiple_data
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Barrelhttps://en.wikipedia.org/wiki/Barrel_processor
Streamhttps://en.wikipedia.org/wiki/Stream_processing
Tile processorhttps://en.wikipedia.org/wiki/Tile_processor
Coprocessorhttps://en.wikipedia.org/wiki/Coprocessor
PALhttps://en.wikipedia.org/wiki/Programmable_Array_Logic
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FPOAhttps://en.wikipedia.org/wiki/Field-programmable_object_array
CPLDhttps://en.wikipedia.org/wiki/Complex_programmable_logic_device
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System in a packagehttps://en.wikipedia.org/wiki/System_in_a_package
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Embedded systemhttps://en.wikipedia.org/wiki/Embedded_system
Microprocessorhttps://en.wikipedia.org/wiki/Microprocessor
Microcontrollerhttps://en.wikipedia.org/wiki/Microcontroller
Mobilehttps://en.wikipedia.org/wiki/Mobile_processor
Ultra-low-voltagehttps://en.wikipedia.org/wiki/Ultra-low-voltage_processor
ASIPhttps://en.wikipedia.org/wiki/Application-specific_instruction_set_processor
Soft microprocessorhttps://en.wikipedia.org/wiki/Soft_microprocessor
System on a chiphttps://en.wikipedia.org/wiki/System_on_a_chip
Multiprocessorhttps://en.wikipedia.org/wiki/Multiprocessor_system_on_a_chip
Cypress PSoChttps://en.wikipedia.org/wiki/Cypress_PSoC
Network on a chiphttps://en.wikipedia.org/wiki/Network_on_a_chip
Hardwareacceleratorshttps://en.wikipedia.org/wiki/Hardware_acceleration
Coprocessorhttps://en.wikipedia.org/wiki/Coprocessor
AI acceleratorhttps://en.wikipedia.org/wiki/AI_accelerator
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Image processorhttps://en.wikipedia.org/wiki/Image_processor
Vision processing unithttps://en.wikipedia.org/wiki/Vision_processing_unit
Physics processing unithttps://en.wikipedia.org/wiki/Physics_processing_unit
Digital signal processorhttps://en.wikipedia.org/wiki/Digital_signal_processor
Tensor Processing Unithttps://en.wikipedia.org/wiki/Tensor_Processing_Unit
Secure cryptoprocessorhttps://en.wikipedia.org/wiki/Secure_cryptoprocessor
Network processorhttps://en.wikipedia.org/wiki/Network_processor
Baseband processorhttps://en.wikipedia.org/wiki/Baseband_processor
Word sizehttps://en.wikipedia.org/wiki/Word_(computer_architecture)
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4-bithttps://en.wikipedia.org/wiki/4-bit_computing
8-bithttps://en.wikipedia.org/wiki/8-bit_computing
12-bithttps://en.wikipedia.org/wiki/12-bit_computing
15-bithttps://en.wikipedia.org/wiki/Apollo_Guidance_Computer
16-bithttps://en.wikipedia.org/wiki/16-bit_computing
24-bithttps://en.wikipedia.org/wiki/24-bit_computing
32-bithttps://en.wikipedia.org/wiki/32-bit_computing
48-bithttps://en.wikipedia.org/wiki/48-bit_computing
64-bithttps://en.wikipedia.org/wiki/64-bit_computing
128-bithttps://en.wikipedia.org/wiki/128-bit_computing
256-bithttps://en.wikipedia.org/wiki/256-bit_computing
512-bithttps://en.wikipedia.org/wiki/512-bit_computing
bit slicinghttps://en.wikipedia.org/wiki/Bit_slicing
othershttps://en.wikipedia.org/wiki/Word_(computer_architecture)#Table_of_word_sizes
variablehttps://en.wikipedia.org/wiki/Word_(computer_architecture)#Variable-word_architectures
Single-corehttps://en.wikipedia.org/wiki/Single-core
Multi-corehttps://en.wikipedia.org/wiki/Multi-core_processor
Manycorehttps://en.wikipedia.org/wiki/Manycore_processor
Heterogeneous architecturehttps://en.wikipedia.org/wiki/Heterogeneous_computing
Corehttps://en.wikipedia.org/wiki/Central_processing_unit
Cachehttps://en.wikipedia.org/wiki/Cache_(computing)
Scratchpad memoryhttps://en.wikipedia.org/wiki/Scratchpad_memory
Data cachehttps://en.wikipedia.org/wiki/Data_cache
Instruction cachehttps://en.wikipedia.org/wiki/Instruction_cache
replacement policieshttps://en.wikipedia.org/wiki/Cache_replacement_policies
coherencehttps://en.wikipedia.org/wiki/Cache_coherence
Bushttps://en.wikipedia.org/wiki/Bus_(computing)
Clock ratehttps://en.wikipedia.org/wiki/Clock_rate
Clock signalhttps://en.wikipedia.org/wiki/Clock_signal
FIFOhttps://en.wikipedia.org/wiki/FIFO_(computing_and_electronics)
Functionalunitshttps://en.wikipedia.org/wiki/Execution_unit
Arithmetic logic unithttps://en.wikipedia.org/wiki/Arithmetic_logic_unit
Address generation unithttps://en.wikipedia.org/wiki/Address_generation_unit
Floating-point unithttps://en.wikipedia.org/wiki/Floating-point_unit
Memory management unithttps://en.wikipedia.org/wiki/Memory_management_unit
Load–store unithttps://en.wikipedia.org/wiki/Load%E2%80%93store_unit
Translation lookaside bufferhttps://en.wikipedia.org/wiki/Translation_lookaside_buffer
Branch predictorhttps://en.wikipedia.org/wiki/Branch_predictor
Branch target predictorhttps://en.wikipedia.org/wiki/Branch_target_predictor
Integrated memory controllerhttps://en.wikipedia.org/wiki/Memory_controller
Memory management unithttps://en.wikipedia.org/wiki/Memory_management_unit
Instruction decoderhttps://en.wikipedia.org/wiki/Instruction_decoder
Logichttps://en.wikipedia.org/wiki/Logic_gate
Combinationalhttps://en.wikipedia.org/wiki/Combinational_logic
Sequentialhttps://en.wikipedia.org/wiki/Sequential_logic
Gluehttps://en.wikipedia.org/wiki/Glue_logic
Logic gatehttps://en.wikipedia.org/wiki/Logic_gate
Quantumhttps://en.wikipedia.org/wiki/Quantum_logic_gate
Arrayhttps://en.wikipedia.org/wiki/Gate_array
Registershttps://en.wikipedia.org/wiki/Hardware_register
Processor registerhttps://en.wikipedia.org/wiki/Processor_register
Status registerhttps://en.wikipedia.org/wiki/Status_register
Stack registerhttps://en.wikipedia.org/wiki/Stack_register
Register filehttps://en.wikipedia.org/wiki/Register_file
Memory bufferhttps://en.wikipedia.org/wiki/Memory_buffer_register
Memory address registerhttps://en.wikipedia.org/wiki/Memory_address_register
Program counterhttps://en.wikipedia.org/wiki/Program_counter
Control unithttps://en.wikipedia.org/wiki/Control_unit
Hardwired control unithttps://en.wikipedia.org/wiki/Hardwired_control_unit
Instruction unithttps://en.wikipedia.org/wiki/Instruction_unit
Data bufferhttps://en.wikipedia.org/wiki/Data_buffer
Write bufferhttps://en.wikipedia.org/wiki/Write_buffer
Microcodehttps://en.wikipedia.org/wiki/Microcode
ROMhttps://en.wikipedia.org/wiki/ROM_image
Counterhttps://en.wikipedia.org/wiki/Counter_(digital)
Datapathhttps://en.wikipedia.org/wiki/Datapath
Multiplexerhttps://en.wikipedia.org/wiki/Multiplexer
Demultiplexerhttps://en.wikipedia.org/wiki/Demultiplexer
Adderhttps://en.wikipedia.org/wiki/Adder_(electronics)
Multiplierhttps://en.wikipedia.org/wiki/Binary_multiplier
CPUhttps://en.wikipedia.org/wiki/CPU_multiplier
Binary decoderhttps://en.wikipedia.org/wiki/Binary_decoder
Address decoderhttps://en.wikipedia.org/wiki/Address_decoder
Sum-addressed decoderhttps://en.wikipedia.org/wiki/Sum-addressed_decoder
Barrel shifterhttps://en.wikipedia.org/wiki/Barrel_shifter
Circuitryhttps://en.wikipedia.org/wiki/Electronic_circuit
Integrated circuithttps://en.wikipedia.org/wiki/Integrated_circuit
3Dhttps://en.wikipedia.org/wiki/Three-dimensional_integrated_circuit
Mixed-signalhttps://en.wikipedia.org/wiki/Mixed-signal_integrated_circuit
Power managementhttps://en.wikipedia.org/wiki/Power_management_integrated_circuit
Booleanhttps://en.wikipedia.org/wiki/Boolean_circuit
Digitalhttps://en.wikipedia.org/wiki/Circuit_(computer_science)
Analoghttps://en.wikipedia.org/wiki/Analogue_electronics
Quantumhttps://en.wikipedia.org/wiki/Quantum_circuit
Switchhttps://en.wikipedia.org/wiki/Switch#Electronic_switches
Powermanagementhttps://en.wikipedia.org/wiki/Power_management
PMUhttps://en.wikipedia.org/wiki/Power_Management_Unit
APMhttps://en.wikipedia.org/wiki/Advanced_Power_Management
ACPIhttps://en.wikipedia.org/wiki/ACPI
Dynamic frequency scalinghttps://en.wikipedia.org/wiki/Dynamic_frequency_scaling
Dynamic voltage scalinghttps://en.wikipedia.org/wiki/Dynamic_voltage_scaling
Clock gatinghttps://en.wikipedia.org/wiki/Clock_gating
Performance per watthttps://en.wikipedia.org/wiki/Performance_per_watt
History of general-purpose CPUshttps://en.wikipedia.org/wiki/History_of_general-purpose_CPUs
Microprocessor chronologyhttps://en.wikipedia.org/wiki/Microprocessor_chronology
Processor designhttps://en.wikipedia.org/wiki/Processor_design
Digital electronicshttps://en.wikipedia.org/wiki/Digital_electronics
Hardware security modulehttps://en.wikipedia.org/wiki/Hardware_security_module
Semiconductor device fabricationhttps://en.wikipedia.org/wiki/Semiconductor_device_fabrication
Tick–tock modelhttps://en.wikipedia.org/wiki/Tick%E2%80%93tock_model
Pin grid arrayhttps://en.wikipedia.org/wiki/Pin_grid_array
Chip carrierhttps://en.wikipedia.org/wiki/Chip_carrier
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Central processing unithttps://en.wikipedia.org/wiki/Category:Central_processing_unit
Computer memoryhttps://en.wikipedia.org/wiki/Category:Computer_memory
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